svn commit: r191276 - in head/sys: amd64/include arm/include i386/include ia64/include mips/include powerpc/include sparc64/include sun4v/include

[Bruce Evans]

On Sun, 19 Apr 2009, Robert Watson wrote:

> Log:
>  For each architecture, define CACHE_LINE_SHIFT and a derived
>  CACHE_LINE_SIZE constant.  These constants are intended to
>  over-estimate the cache line size, and be used at compile-time
>  when a run-time tuning alternative isn't appropriate or
>  available.
>
>  Defaults for all architectures are 64 bytes, except powerpc
>  where it is 128 bytes (used on G5 systems).
> ...
> Modified: head/sys/amd64/include/param.h
> ==============================================================================
> --- head/sys/amd64/include/param.h	Sun Apr 19 18:23:23 2009	(r191275)
> +++ head/sys/amd64/include/param.h	Sun Apr 19 20:19:13 2009	(r191276)
> @@ -89,6 +89,10 @@
> #define	ALIGN(p)		_ALIGN(p)
> #define	ALIGNED_POINTER(p,t)	_ALIGNED_POINTER(p,t)
>
> +#ifndef CACHE_LINE_SHIFT
> +#define	CACHE_LINE_SHIFT	6
> +#endif
> +#define	CACHE_LINE_SIZE		(1 << CACHE_LINE_SHIFT)

This still has the bogus ifdef.  Overriding the definition is difficult
to do consistently even in a kernel with no modules, since CACHE_LINE_SIZE
is not a kernel option.  Overriding the definition makes negative sense
since the value is a maximum-maximum (possibly larger than strictly needed)
so that it can be constant.

Bruce