svn commit: r184382 - head/sys/powerpc/powermac

[Nathan Whitehorn]

Author: nwhitehorn
Date: Mon Oct 27 23:11:14 2008
New Revision: 184382
URL: http://svn.freebsd.org/changeset/base/184382

Log:
  Clean up some magic numbers in the DBDMA code by replacing them with
  appropriately defined constants.
  
  Suggested by:	gnn

Modified:
  head/sys/powerpc/powermac/dbdma.c
  head/sys/powerpc/powermac/dbdmavar.h

Modified: head/sys/powerpc/powermac/dbdma.c
==============================================================================
--- head/sys/powerpc/powermac/dbdma.c	Mon Oct 27 22:44:22 2008	(r184381)
+++ head/sys/powerpc/powermac/dbdma.c	Mon Oct 27 23:11:14 2008	(r184382)
@@ -93,7 +93,7 @@ int
 dbdma_resize_channel(dbdma_channel_t *chan, int newslots)
 {
 
-	if (newslots > (PAGE_SIZE / 16))
+	if (newslots > (PAGE_SIZE / sizeof(struct dbdma_command)))
 		return (-1);
 	
 	chan->sc_nslots = newslots;
@@ -159,7 +159,8 @@ dbdma_run(dbdma_channel_t *chan)
 
 	control_reg = DBDMA_STATUS_RUN | DBDMA_STATUS_PAUSE |
 	    DBDMA_STATUS_WAKE | DBDMA_STATUS_DEAD;
-	control_reg <<= 16;
+	control_reg <<= DBDMA_REG_MASK_SHIFT;
+
 	control_reg |= DBDMA_STATUS_RUN;
 	dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
 }
@@ -170,7 +171,8 @@ dbdma_pause(dbdma_channel_t *chan)
 	uint32_t control_reg;
 
 	control_reg = DBDMA_STATUS_PAUSE;
-	control_reg <<= 16;
+	control_reg <<= DBDMA_REG_MASK_SHIFT;
+
 	control_reg |= DBDMA_STATUS_PAUSE;
 	dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
 }
@@ -182,7 +184,8 @@ dbdma_wake(dbdma_channel_t *chan)
 
 	control_reg = DBDMA_STATUS_WAKE | DBDMA_STATUS_PAUSE |
 	    DBDMA_STATUS_RUN | DBDMA_STATUS_DEAD;
-	control_reg <<= 16;
+	control_reg <<= DBDMA_REG_MASK_SHIFT;
+
 	control_reg |= DBDMA_STATUS_WAKE | DBDMA_STATUS_RUN;
 	dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
 }
@@ -193,7 +196,8 @@ dbdma_stop(dbdma_channel_t *chan)
 	uint32_t control_reg;
 
 	control_reg = DBDMA_STATUS_RUN;
-	control_reg <<= 16;
+	control_reg <<= DBDMA_REG_MASK_SHIFT;
+
 	dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
 
 	while (dbdma_read_reg(chan, CHAN_STATUS_REG) & DBDMA_STATUS_ACTIVE)
@@ -205,7 +209,7 @@ dbdma_set_current_cmd(dbdma_channel_t *c
 {
 	uint32_t cmd;
 
-	cmd = chan->sc_slots_pa + slot * 16;
+	cmd = chan->sc_slots_pa + slot * sizeof(struct dbdma_command);
 	dbdma_write_reg(chan, CHAN_CMDPTR, cmd);
 }
 
@@ -230,7 +234,7 @@ dbdma_set_device_status(dbdma_channel_t 
 	uint32_t control_reg;
 	
 	control_reg = mask;
-	control_reg <<= 16;
+	control_reg <<= DBDMA_REG_MASK_SHIFT;
 	control_reg |= value;
 
 	dbdma_write_reg(chan, CHAN_CONTROL_REG, control_reg);
@@ -242,7 +246,8 @@ dbdma_set_interrupt_selector(dbdma_chann
 	uint32_t intr_select;
 
 	intr_select = mask;
-	intr_select <<= 16;
+	intr_select <<= DBDMA_REG_MASK_SHIFT;
+
 	intr_select |= val;
 	dbdma_write_reg(chan, CHAN_INTR_SELECT, intr_select);
 }
@@ -253,7 +258,8 @@ dbdma_set_branch_selector(dbdma_channel_
 	uint32_t br_select;
 
 	br_select = mask;
-	br_select <<= 16;
+	br_select <<= DBDMA_REG_MASK_SHIFT;
+
 	br_select |= val;
 	dbdma_write_reg(chan, CHAN_BRANCH_SELECT, br_select);
 }
@@ -264,7 +270,7 @@ dbdma_set_wait_selector(dbdma_channel_t 
 	uint32_t wait_select;
 
 	wait_select = mask;
-	wait_select <<= 16;
+	wait_select <<= DBDMA_REG_MASK_SHIFT;
 	wait_select |= val;
 	dbdma_write_reg(chan, CHAN_WAIT_SELECT, wait_select);
 }
@@ -286,7 +292,8 @@ dbdma_insert_command(dbdma_channel_t *ch
 	cmd.reqCount = count;
 	cmd.address = (uint32_t)(data);
 	if (command != DBDMA_STORE_QUAD && command != DBDMA_LOAD_QUAD)
-		cmd.cmdDep = chan->sc_slots_pa + branch_slot * 16;
+		cmd.cmdDep = chan->sc_slots_pa + 
+		    branch_slot * sizeof(struct dbdma_command);
 	else
 		cmd.cmdDep = branch_slot;
 

Modified: head/sys/powerpc/powermac/dbdmavar.h
==============================================================================
--- head/sys/powerpc/powermac/dbdmavar.h	Mon Oct 27 22:44:22 2008	(r184381)
+++ head/sys/powerpc/powermac/dbdmavar.h	Mon Oct 27 23:11:14 2008	(r184382)
@@ -87,6 +87,8 @@ struct dbdma_channel {
 /* Channel control is the write channel to channel status, the upper 16 bits
    are a mask of which bytes to change */
 
+#define	DBDMA_REG_MASK_SHIFT	16
+
 /* Status bits 0-7 are device dependent status bits */
 
 /*