svn commit: r184932 - head/lib/libpmc
Joseph Koshy
jkoshy at FreeBSD.org
Thu Nov 13 08:32:21 PST 2008
Author: jkoshy
Date: Thu Nov 13 16:32:20 2008
New Revision: 184932
URL: http://svn.freebsd.org/changeset/base/184932
Log:
Tweak -mdoc usage.
Modified:
head/lib/libpmc/pmc.atom.3
head/lib/libpmc/pmc.core.3
head/lib/libpmc/pmc.core2.3
Modified: head/lib/libpmc/pmc.atom.3
==============================================================================
--- head/lib/libpmc/pmc.atom.3 Thu Nov 13 16:17:50 2008 (r184931)
+++ head/lib/libpmc/pmc.atom.3 Thu Nov 13 16:32:20 2008 (r184932)
@@ -930,7 +930,7 @@ The number of cycles micro-ops were disp
The number of cycles micro-ops were dispatched for execution on port
4.
.It Li RS_UOPS_DISPATCHED.PORT5
-.Pq Event A1H , Umask 20
+.Pq Event A1H , Umask 20H
The number of cycles micro-ops were dispatched for execution on port
5.
.It Li SB_DRAIN_CYCLES
@@ -1116,7 +1116,7 @@ globally observed.
The number of cycles while a store was blocked due to a conflict with
an internal or external snoop.
.It Li STORE_FORWARDS.GOOD
-.Pq Event 02, Umask 81H
+.Pq Event 02H , Umask 81H
The number of times stored data was forwarded directly to a load.
.It Li THERMAL_TRIP
.Pq Event 3BH , Umask C0H
Modified: head/lib/libpmc/pmc.core.3
==============================================================================
--- head/lib/libpmc/pmc.core.3 Thu Nov 13 16:17:50 2008 (r184931)
+++ head/lib/libpmc/pmc.core.3 Thu Nov 13 16:32:20 2008 (r184932)
@@ -234,12 +234,12 @@ The number of branch instructions execut
.Pq Event E0H , Umask 00H
The number of branch instructions decoded.
.It Li Br_Instr_Ret
-.Pq Event C4H, Umask 00H
+.Pq Event C4H , Umask 00H
.Pq Alias Qq "Branch Instruction Retired"
The number of branch instructions retired.
This is an architectural performance event.
.It Li Br_MisPred_Ret
-.Pq Event C5H, Umask 00H
+.Pq Event C5H , Umask 00H
.Pq Alias Qq "Branch Misses Retired"
The number of mispredicted branch instructions retired.
This is an architectural performance event.
@@ -553,7 +553,7 @@ The number of L2 cache writes including
.Pq Event 03H , Umask 00H
The number of load operations delayed due to store buffer blocks.
.It Li LLC_Misses
-.Pq Event 2EH, Umask 41H
+.Pq Event 2EH , Umask 41H
The number of cache misses for references to the last level cache,
excluding misses due to hardware prefetches.
This is an architectural performance event.
@@ -561,7 +561,7 @@ This is an architectural performance eve
The number of references to the last level cache,
excluding those due to hardware prefetches.
This is an architectural performance event.
-.Pq Event 2EH, Umask 4FH
+.Pq Event 2EH , Umask 4FH
This is an architectural performance event.
.It Li MMX_Assist
.Pq Event CDH , Umask 00H
Modified: head/lib/libpmc/pmc.core2.3
==============================================================================
--- head/lib/libpmc/pmc.core2.3 Thu Nov 13 16:17:50 2008 (r184931)
+++ head/lib/libpmc/pmc.core2.3 Thu Nov 13 16:32:20 2008 (r184932)
@@ -275,7 +275,7 @@ The number of branches executed, but not
The number of branch instructions retired.
This is an architectural performance event.
.It Li BR_INST_RETIRED.MISPRED
-.Pq Event C5H, Umask 00H
+.Pq Event C5H , Umask 00H
.Pq Alias Qq "Branch Misses Retired"
The number of mispredicted branch instructions retired.
This is an architectural performance event.
More information about the svn-src-head
mailing list