svn commit: r368141 - in head/sys/arm: allwinner annapurna/alpine arm freescale/imx include mv versatile
Michal Meloun
mmel at FreeBSD.org
Sun Nov 29 08:40:16 UTC 2020
Author: mmel
Date: Sun Nov 29 08:40:12 2020
New Revision: 368141
URL: https://svnweb.freebsd.org/changeset/base/368141
Log:
Remove the pre-ARMv6 and pre-INTRNG code.
ARM has required ARMV6+ and INTRNg for some time now, so remove
always false #ifdefs and unconditionally do always true #ifdefs.
Deleted:
head/sys/arm/annapurna/alpine/alpine_common.c
head/sys/arm/freescale/imx/imx_common.c
head/sys/arm/versatile/versatile_common.c
Modified:
head/sys/arm/allwinner/aw_gpio.c
head/sys/arm/allwinner/files.allwinner
head/sys/arm/annapurna/alpine/files.alpine
head/sys/arm/arm/bcopyinout.S
head/sys/arm/arm/bcopyinout_xscale.S
head/sys/arm/arm/bus_space_base.c
head/sys/arm/arm/copystr.S
head/sys/arm/arm/cpuinfo.c
head/sys/arm/arm/db_interface.c
head/sys/arm/arm/debug_monitor.c
head/sys/arm/arm/disassem.c
head/sys/arm/arm/elf_machdep.c
head/sys/arm/arm/exception.S
head/sys/arm/arm/fiq.c
head/sys/arm/arm/fusu.S
head/sys/arm/arm/genassym.c
head/sys/arm/arm/machdep.c
head/sys/arm/arm/machdep_intr.c
head/sys/arm/arm/machdep_kdb.c
head/sys/arm/arm/mem.c
head/sys/arm/arm/minidump_machdep.c
head/sys/arm/arm/mp_machdep.c
head/sys/arm/arm/nexus.c
head/sys/arm/arm/stdatomic.c
head/sys/arm/arm/sys_machdep.c
head/sys/arm/arm/vm_machdep.c
head/sys/arm/freescale/imx/files.imx5
head/sys/arm/include/_align.h
head/sys/arm/include/armreg.h
head/sys/arm/include/asmacros.h
head/sys/arm/include/atomic-v6.h
head/sys/arm/include/bus.h
head/sys/arm/include/bus_dma.h
head/sys/arm/include/cpu-v6.h
head/sys/arm/include/cpufunc.h
head/sys/arm/include/cpuinfo.h
head/sys/arm/include/db_machdep.h
head/sys/arm/include/debug_monitor.h
head/sys/arm/include/fdt.h
head/sys/arm/include/frame.h
head/sys/arm/include/intr.h
head/sys/arm/include/kdb.h
head/sys/arm/include/machdep.h
head/sys/arm/include/pcpu.h
head/sys/arm/include/proc.h
head/sys/arm/include/sf_buf.h
head/sys/arm/include/sysarch.h
head/sys/arm/include/sysreg.h
head/sys/arm/include/vm.h
head/sys/arm/mv/gpio.c
head/sys/arm/mv/mpic.c
head/sys/arm/mv/mv_common.c
head/sys/arm/mv/mv_pci.c
head/sys/arm/versatile/files.versatile
Modified: head/sys/arm/allwinner/aw_gpio.c
==============================================================================
--- head/sys/arm/allwinner/aw_gpio.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/allwinner/aw_gpio.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -62,10 +62,7 @@ __FBSDID("$FreeBSD$");
#include "opt_soc.h"
#endif
-#ifdef INTRNG
#include "pic_if.h"
-#endif
-
#include "gpio_if.h"
#define AW_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
@@ -257,7 +254,6 @@ struct clk_list {
clk_t clk;
};
-#ifdef INTRNG
struct gpio_irqsrc {
struct intr_irqsrc isrc;
u_int irq;
@@ -269,7 +265,6 @@ struct gpio_irqsrc {
uint32_t oldfunc;
bool enabled;
};
-#endif
#define AW_GPIO_MEMRES 0
#define AW_GPIO_IRQRES 1
@@ -286,10 +281,8 @@ struct aw_gpio_softc {
struct aw_gpio_conf *conf;
TAILQ_HEAD(, clk_list) clk_list;
-#ifdef INTRNG
struct gpio_irqsrc *gpio_pic_irqsrc;
int nirqs;
-#endif
};
static struct resource_spec aw_gpio_res_spec[] = {
@@ -1071,10 +1064,8 @@ aw_gpio_attach(device_t dev)
goto fail;
}
-#ifdef INTRNG
aw_gpio_register_isrcs(sc);
intr_pic_register(dev, OF_xref_from_node(ofw_bus_get_node(dev)));
-#endif
sc->sc_busdev = gpiobus_attach_bus(dev);
if (sc->sc_busdev == NULL)
@@ -1451,7 +1442,6 @@ static device_method_t aw_gpio_methods[] = {
DEVMETHOD(device_attach, aw_gpio_attach),
DEVMETHOD(device_detach, aw_gpio_detach),
-#ifdef INTRNG
/* Interrupt controller interface */
DEVMETHOD(pic_disable_intr, aw_gpio_pic_disable_intr),
DEVMETHOD(pic_enable_intr, aw_gpio_pic_enable_intr),
@@ -1461,7 +1451,6 @@ static device_method_t aw_gpio_methods[] = {
DEVMETHOD(pic_post_filter, aw_gpio_pic_post_filter),
DEVMETHOD(pic_post_ithread, aw_gpio_pic_post_ithread),
DEVMETHOD(pic_pre_ithread, aw_gpio_pic_pre_ithread),
-#endif
/* GPIO protocol */
DEVMETHOD(gpio_get_bus, aw_gpio_get_bus),
Modified: head/sys/arm/allwinner/files.allwinner
==============================================================================
--- head/sys/arm/allwinner/files.allwinner Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/allwinner/files.allwinner Sun Nov 29 08:40:12 2020 (r368141)
@@ -10,7 +10,7 @@ arm/allwinner/aw_if_dwc.c optional dwc
arm/allwinner/aw_machdep.c standard
arm/allwinner/aw_mmc.c optional mmc | mmccam
arm/allwinner/aw_mp.c optional smp
-arm/allwinner/aw_nmi.c optional intrng
+arm/allwinner/aw_nmi.c standard
arm/allwinner/aw_rsb.c optional rsb | p2wi
arm/allwinner/aw_rtc.c optional aw_rtc
arm/allwinner/aw_syscon.c optional ext_resources syscon
Modified: head/sys/arm/annapurna/alpine/files.alpine
==============================================================================
--- head/sys/arm/annapurna/alpine/files.alpine Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/annapurna/alpine/files.alpine Sun Nov 29 08:40:12 2020 (r368141)
@@ -3,6 +3,5 @@
arm/versatile/sp804.c standard
dev/uart/uart_dev_ns8250.c optional uart
-arm/annapurna/alpine/alpine_common.c standard
arm/annapurna/alpine/alpine_machdep.c standard
arm/annapurna/alpine/alpine_machdep_mp.c optional smp
Modified: head/sys/arm/arm/bcopyinout.S
==============================================================================
--- head/sys/arm/arm/bcopyinout.S Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/bcopyinout.S Sun Nov 29 08:40:12 2020 (r368141)
@@ -54,18 +54,9 @@ __FBSDID("$FreeBSD$");
.text
.align 2
-#if __ARM_ARCH >= 6
#define GET_PCB(tmp) \
mrc p15, 0, tmp, c13, c0, 4; \
add tmp, tmp, #(TD_PCB)
-#else
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-
-#define GET_PCB(tmp) \
- ldr tmp, .Lcurpcb
-#endif
-
#define SAVE_REGS stmfd sp!, {r4-r11}; _SAVE({r4-r11})
#define RESTORE_REGS ldmfd sp!, {r4-r11}
Modified: head/sys/arm/arm/bcopyinout_xscale.S
==============================================================================
--- head/sys/arm/arm/bcopyinout_xscale.S Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/bcopyinout_xscale.S Sun Nov 29 08:40:12 2020 (r368141)
@@ -42,16 +42,9 @@ __FBSDID("$FreeBSD$");
.text
.align 2
-#if __ARM_ARCH >= 6
#define GET_PCB(tmp) \
mrc p15, 0, tmp, c13, c0, 4; \
add tmp, tmp, #(TD_PCB)
-#else
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-#define GET_PCB(tmp) \
- ldr tmp, .Lcurpcb
-#endif
/*
* r0 = user space address
Modified: head/sys/arm/arm/bus_space_base.c
==============================================================================
--- head/sys/arm/arm/bus_space_base.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/bus_space_base.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -156,6 +156,3 @@ static struct bus_space arm_base_bus_space __aligned(C
bus_space_tag_t fdtbus_bs_tag = &arm_base_bus_space;
#endif
-#if __ARM_ARCH < 6
-bus_space_tag_t arm_base_bs_tag = &arm_base_bus_space;
-#endif
Modified: head/sys/arm/arm/copystr.S
==============================================================================
--- head/sys/arm/arm/copystr.S Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/copystr.S Sun Nov 29 08:40:12 2020 (r368141)
@@ -48,17 +48,9 @@ __FBSDID("$FreeBSD$");
.text
.align 2
-#if __ARM_ARCH >= 6
#define GET_PCB(tmp) \
mrc p15, 0, tmp, c13, c0, 4; \
add tmp, tmp, #(TD_PCB)
-#else
-.Lpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-
-#define GET_PCB(tmp) \
- ldr tmp, .Lpcb
-#endif
#define SAVE_REGS stmfd sp!, {r4-r6}
#define RESTORE_REGS ldmfd sp!, {r4-r6}
Modified: head/sys/arm/arm/cpuinfo.c
==============================================================================
--- head/sys/arm/arm/cpuinfo.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/cpuinfo.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -40,12 +40,10 @@ __FBSDID("$FreeBSD$");
#include <machine/elf.h>
#include <machine/md_var.h>
-#if __ARM_ARCH >= 6
void reinit_mmu(uint32_t ttb, uint32_t aux_clr, uint32_t aux_set);
int disable_bp_hardening;
int spectre_v2_safe = 1;
-#endif
struct cpuinfo cpuinfo =
{
@@ -83,9 +81,7 @@ SYSCTL_INT(_hw_cpu_quirks, OID_AUTO, actlr_set,
void
cpuinfo_init(void)
{
-#if __ARM_ARCH >= 6
uint32_t tmp;
-#endif
/*
* Prematurely fetch CPU quirks. Standard fetch for tunable
@@ -130,16 +126,13 @@ cpuinfo_init(void)
/* CP15 c0,c0 regs 0-7 exist on all CPUs (although aliased with MIDR) */
cpuinfo.ctr = cp15_ctr_get();
cpuinfo.tcmtr = cp15_tcmtr_get();
-#if __ARM_ARCH >= 6
cpuinfo.tlbtr = cp15_tlbtr_get();
cpuinfo.mpidr = cp15_mpidr_get();
cpuinfo.revidr = cp15_revidr_get();
-#endif
/* if CPU is not v7 cpu id scheme */
if (cpuinfo.architecture != 0xF)
return;
-#if __ARM_ARCH >= 6
cpuinfo.id_pfr0 = cp15_id_pfr0_get();
cpuinfo.id_pfr1 = cp15_id_pfr1_get();
cpuinfo.id_dfr0 = cp15_id_dfr0_get();
@@ -240,10 +233,8 @@ cpuinfo_init(void)
tmp = (cpuinfo.id_isar5 >> 16) & 0xF; /* CRC32 */
if (tmp >= 1)
elf_hwcap2 |= HWCAP2_CRC32;
-#endif
}
-#if __ARM_ARCH >= 6
/*
* Get bits that must be set or cleared in ACLR register.
* Note: Bits in ACLR register are IMPLEMENTATION DEFINED.
@@ -535,5 +526,3 @@ SYSCTL_PROC(_machdep, OID_AUTO, disable_bp_hardening,
SYSCTL_INT(_machdep, OID_AUTO, spectre_v2_safe, CTLFLAG_RD,
&spectre_v2_safe, 0, "System is safe to Spectre Version 2 attacks");
-
-#endif /* __ARM_ARCH >= 6 */
Modified: head/sys/arm/arm/db_interface.c
==============================================================================
--- head/sys/arm/arm/db_interface.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/db_interface.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -153,10 +153,9 @@ void
db_show_mdpcpu(struct pcpu *pc)
{
-#if __ARM_ARCH >= 6
db_printf("curpmap = %p\n", pc->pc_curpmap);
-#endif
}
+
int
db_validate_address(vm_offset_t addr)
{
Modified: head/sys/arm/arm/debug_monitor.c
==============================================================================
--- head/sys/arm/arm/debug_monitor.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/debug_monitor.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -257,7 +257,6 @@ kdb_cpu_pc_is_singlestep(db_addr_t pc)
/*
* XXX: If the platform fails to enable its debug arch.
* there will be no stepping capabilities
- * (SOFTWARE_SSTEP is not defined for __ARM_ARCH >= 6).
*/
if (!dbg_capable())
return (FALSE);
Modified: head/sys/arm/arm/disassem.c
==============================================================================
--- head/sys/arm/arm/disassem.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/disassem.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -131,7 +131,6 @@ static const struct arm32_insn arm32_i[] = {
{ 0x0c500000, 0x04100000, "ldr", "daW" },
{ 0x0c500000, 0x04400000, "strb", "daW" },
{ 0x0c500000, 0x04500000, "ldrb", "daW" },
-#if __ARM_ARCH >= 6
{ 0x0fff0ff0, 0x06bf0fb0, "rev16", "dm" },
{ 0xffffffff, 0xf57ff01f, "clrex", "c" },
{ 0x0ff00ff0, 0x01800f90, "strex", "dmo" },
@@ -142,7 +141,6 @@ static const struct arm32_insn arm32_i[] = {
{ 0x0ff00fff, 0x01d00f9f, "ldrexb", "do" },
{ 0x0ff00ff0, 0x01e00f90, "strexh", "dmo" },
{ 0x0ff00fff, 0x01f00f9f, "ldrexh", "do" },
-#endif
{ 0x0e1f0000, 0x080d0000, "stm", "YnWl" },/* separate out r13 base */
{ 0x0e1f0000, 0x081d0000, "ldm", "YnWl" },/* separate out r13 base */
{ 0x0e100000, 0x08000000, "stm", "XnWl" },
Modified: head/sys/arm/arm/elf_machdep.c
==============================================================================
--- head/sys/arm/arm/elf_machdep.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/elf_machdep.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -85,9 +85,7 @@ struct sysentvec elf32_freebsd_sysvec = {
.sv_fixlimit = NULL,
.sv_maxssiz = NULL,
.sv_flags =
-#if __ARM_ARCH >= 6
SV_ASLR | SV_SHP | SV_TIMEKEEP | SV_RNG_SEED_VER |
-#endif
SV_ABI_FREEBSD | SV_ILP32 | SV_ASLR,
.sv_set_syscall_retval = cpu_set_syscall_retval,
.sv_fetch_syscall_args = cpu_fetch_syscall_args,
@@ -305,14 +303,8 @@ elf_cpu_load_file(linker_file_t lf)
*/
if (lf->id == 1)
return (0);
-#if __ARM_ARCH >= 6
dcache_wb_pou((vm_offset_t)lf->address, (vm_size_t)lf->size);
icache_inv_all();
-#else
- cpu_dcache_wb_range((vm_offset_t)lf->address, (vm_size_t)lf->size);
- cpu_l2cache_wb_range((vm_offset_t)lf->address, (vm_size_t)lf->size);
- cpu_icache_sync_range((vm_offset_t)lf->address, (vm_size_t)lf->size);
-#endif
#if defined(DDB) || defined(KDTRACE_HOOKS) || defined(STACK)
/*
Modified: head/sys/arm/arm/exception.S
==============================================================================
--- head/sys/arm/arm/exception.S Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/exception.S Sun Nov 29 08:40:12 2020 (r368141)
@@ -77,11 +77,7 @@ _C_LABEL(dtrace_invop_jump_addr):
/*
* PUSHFRAME - macro to push a trap frame on the stack in the current mode
* Since the current mode is used, the SVC lr field is not defined.
- *
- * NOTE: r13 and r14 are stored separately as a work around for the
- * SA110 rev 2 STM^ bug
*/
-#if __ARM_ARCH < 6
#define PUSHFRAME \
sub sp, sp, #4; /* Align the stack */ \
str lr, [sp, #-4]!; /* Push the return address */ \
@@ -91,41 +87,14 @@ _C_LABEL(dtrace_invop_jump_addr):
stmia r0, {r13-r14}^; /* Push the user mode registers */ \
mov r0, r0; /* NOP for previous instruction */ \
mrs r0, spsr; /* Put the SPSR on the stack */ \
- str r0, [sp, #-4]!; \
- ldr r0, =ARM_RAS_START; \
- mov r1, #0; \
- str r1, [r0]; \
- mov r1, #0xffffffff; \
- str r1, [r0, #4];
-#else
-#define PUSHFRAME \
- sub sp, sp, #4; /* Align the stack */ \
- str lr, [sp, #-4]!; /* Push the return address */ \
- sub sp, sp, #(4*17); /* Adjust the stack pointer */ \
- stmia sp, {r0-r12}; /* Push the user mode registers */ \
- add r0, sp, #(4*13); /* Adjust the stack pointer */ \
- stmia r0, {r13-r14}^; /* Push the user mode registers */ \
- mov r0, r0; /* NOP for previous instruction */ \
- mrs r0, spsr; /* Put the SPSR on the stack */ \
str r0, [sp, #-4]!;
-#endif
/*
* PULLFRAME - macro to pull a trap frame from the stack in the current mode
* Since the current mode is used, the SVC lr field is ignored.
*/
-#if __ARM_ARCH < 6
#define PULLFRAME \
- ldr r0, [sp], #4; /* Get the SPSR from stack */ \
- msr spsr_fsxc, r0; \
- ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
- mov r0, r0; /* NOP for previous instruction */ \
- add sp, sp, #(4*17); /* Adjust the stack pointer */ \
- ldr lr, [sp], #4; /* Pull the return address */ \
- add sp, sp, #4 /* Align the stack */
-#else
-#define PULLFRAME \
ldr r0, [sp], #4 ; /* Get the SPSR from stack */ \
msr spsr_fsxc, r0; \
clrex; \
@@ -134,7 +103,6 @@ _C_LABEL(dtrace_invop_jump_addr):
add sp, sp, #(4*17); /* Adjust the stack pointer */ \
ldr lr, [sp], #4; /* Pull the return address */ \
add sp, sp, #4 /* Align the stack */
-#endif
/*
* PUSHFRAMEINSVC - macro to push a trap frame on the stack in SVC32 mode
@@ -142,54 +110,12 @@ _C_LABEL(dtrace_invop_jump_addr):
* mode. The processor mode is switched to SVC mode and the trap frame is
* stored. The SVC lr field is used to store the previous value of
* lr in SVC mode.
- *
- * NOTE: r13 and r14 are stored separately as a work around for the
- * SA110 rev 2 STM^ bug
*/
-#if __ARM_ARCH < 6
#define PUSHFRAMEINSVC \
stmdb sp, {r0-r3}; /* Save 4 registers */ \
mov r0, lr; /* Save xxx32 r14 */ \
mov r1, sp; /* Save xxx32 sp */ \
mrs r3, spsr; /* Save xxx32 spsr */ \
- mrs r2, cpsr; /* Get the CPSR */ \
- bic r2, r2, #(PSR_MODE); /* Fix for SVC mode */ \
- orr r2, r2, #(PSR_SVC32_MODE); \
- msr cpsr_c, r2; /* Punch into SVC mode */ \
- mov r2, sp; /* Save SVC sp */ \
- bic sp, sp, #7; /* Align sp to an 8-byte addrress */ \
- sub sp, sp, #(4 * 17); /* Pad trapframe to keep alignment */ \
- /* and for dtrace to emulate push/pop */ \
- str r0, [sp, #-4]!; /* Push return address */ \
- str lr, [sp, #-4]!; /* Push SVC lr */ \
- str r2, [sp, #-4]!; /* Push SVC sp */ \
- msr spsr_fsxc, r3; /* Restore correct spsr */ \
- ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \
- sub sp, sp, #(4*15); /* Adjust the stack pointer */ \
- stmia sp, {r0-r12}; /* Push the user mode registers */ \
- add r0, sp, #(4*13); /* Adjust the stack pointer */ \
- stmia r0, {r13-r14}^; /* Push the user mode registers */ \
- mov r0, r0; /* NOP for previous instruction */ \
- ldr r5, =ARM_RAS_START; /* Check if there's any RAS */ \
- ldr r4, [r5, #4]; /* reset it to point at the */ \
- cmp r4, #0xffffffff; /* end of memory if necessary; */ \
- movne r1, #0xffffffff; /* leave value in r4 for later */ \
- strne r1, [r5, #4]; /* comparison against PC. */ \
- ldr r3, [r5]; /* Retrieve global RAS_START */ \
- cmp r3, #0; /* and reset it if non-zero. */ \
- movne r1, #0; /* If non-zero RAS_START and */ \
- strne r1, [r5]; /* PC was lower than RAS_END, */ \
- ldrne r1, [r0, #16]; /* adjust the saved PC so that */ \
- cmpne r4, r1; /* execution later resumes at */ \
- strhi r3, [r0, #16]; /* the RAS_START location. */ \
- mrs r0, spsr; \
- str r0, [sp, #-4]!
-#else
-#define PUSHFRAMEINSVC \
- stmdb sp, {r0-r3}; /* Save 4 registers */ \
- mov r0, lr; /* Save xxx32 r14 */ \
- mov r1, sp; /* Save xxx32 sp */ \
- mrs r3, spsr; /* Save xxx32 spsr */ \
mrs r2, cpsr; /* Get the CPSR */ \
bic r2, r2, #(PSR_MODE); /* Fix for SVC mode */ \
orr r2, r2, #(PSR_SVC32_MODE); \
@@ -210,7 +136,6 @@ _C_LABEL(dtrace_invop_jump_addr):
mov r0, r0; /* NOP for previous instruction */ \
mrs r0, spsr; /* Put the SPSR on the stack */ \
str r0, [sp, #-4]!
-#endif
/*
* PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
@@ -219,24 +144,14 @@ _C_LABEL(dtrace_invop_jump_addr):
* exit.
*/
-#if __ARM_ARCH < 6
#define PULLFRAMEFROMSVCANDEXIT \
ldr r0, [sp], #4; /* Get the SPSR from stack */ \
msr spsr_fsxc, r0; /* restore SPSR */ \
- ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
- mov r0, r0; /* NOP for previous instruction */ \
- add sp, sp, #(4*15); /* Adjust the stack pointer */ \
- ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
-#else
-#define PULLFRAMEFROMSVCANDEXIT \
- ldr r0, [sp], #4; /* Get the SPSR from stack */ \
- msr spsr_fsxc, r0; /* restore SPSR */ \
clrex; \
ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
mov r0, r0; /* NOP for previous instruction */ \
add sp, sp, #(4*15); /* Adjust the stack pointer */ \
ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
-#endif
/*
* Unwind hints so we can unwind past functions that use
Modified: head/sys/arm/arm/fiq.c
==============================================================================
--- head/sys/arm/arm/fiq.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/fiq.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -75,15 +75,7 @@ fiq_installhandler(void *func, size_t size)
{
const uint32_t fiqvector = 7 * sizeof(uint32_t);
-#if __ARM_ARCH < 6 && !defined(__ARM_FIQ_INDIRECT)
- vector_page_setprot(VM_PROT_READ|VM_PROT_WRITE);
-#endif
-
memcpy((void *)(vector_page + fiqvector), func, size);
-
-#if __ARM_ARCH < 6 && !defined(__ARM_FIQ_INDIRECT)
- vector_page_setprot(VM_PROT_READ);
-#endif
icache_sync((vm_offset_t) fiqvector, size);
}
Modified: head/sys/arm/arm/fusu.S
==============================================================================
--- head/sys/arm/arm/fusu.S Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/fusu.S Sun Nov 29 08:40:12 2020 (r368141)
@@ -40,16 +40,9 @@ __FBSDID("$FreeBSD$");
.syntax unified
-#if __ARM_ARCH >= 6
#define GET_PCB(tmp) \
mrc p15, 0, tmp, c13, c0, 4; \
add tmp, tmp, #(TD_PCB)
-#else
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-#define GET_PCB(tmp) \
- ldr tmp, .Lcurpcb
-#endif
/*
* casueword32(volatile uint32_t *base, uint32_t oldval, uint32_t *oldvalp,
@@ -77,22 +70,14 @@ EENTRY_NP(casueword32)
adr r4, .Lcasuwordfault
str r4, [r6, #PCB_ONFAULT]
-#if __ARM_ARCH >= 6
mov r5, #1
ldrex r4, [r0]
cmp r4, r1
strexeq r5, r3, [r0]
-#else
- ldrt r4, [r0]
- cmp r4, r1
- strteq r3, [r0]
-#endif
str r4, [r2]
mov r0, #0
str r0, [r6, #PCB_ONFAULT]
-#if __ARM_ARCH >= 6
mov r0, r5
-#endif
1:
ldmfd sp!, {r4, r5, r6}
RET
Modified: head/sys/arm/arm/genassym.c
==============================================================================
--- head/sys/arm/arm/genassym.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/genassym.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -62,18 +62,9 @@ __FBSDID("$FreeBSD$");
ASSYM(KERNBASE, KERNBASE);
ASSYM(KERNVIRTADDR, KERNVIRTADDR);
-#if __ARM_ARCH >= 6
ASSYM(CPU_ASID_KERNEL,CPU_ASID_KERNEL);
-#endif
ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
-#if __ARM_ARCH < 6
-ASSYM(PCB_DACR, offsetof(struct pcb, pcb_dacr));
-#endif
ASSYM(PCB_PAGEDIR, offsetof(struct pcb, pcb_pagedir));
-#if __ARM_ARCH < 6
-ASSYM(PCB_L1VEC, offsetof(struct pcb, pcb_l1vec));
-ASSYM(PCB_PL1VEC, offsetof(struct pcb, pcb_pl1vec));
-#endif
ASSYM(PCB_R4, offsetof(struct pcb, pcb_regs.sf_r4));
ASSYM(PCB_R5, offsetof(struct pcb, pcb_regs.sf_r5));
ASSYM(PCB_R6, offsetof(struct pcb, pcb_regs.sf_r6));
@@ -86,9 +77,7 @@ ASSYM(PCB_R12, offsetof(struct pcb, pcb_regs.sf_r12));
ASSYM(PCB_SP, offsetof(struct pcb, pcb_regs.sf_sp));
ASSYM(PCB_LR, offsetof(struct pcb, pcb_regs.sf_lr));
ASSYM(PCB_PC, offsetof(struct pcb, pcb_regs.sf_pc));
-#if __ARM_ARCH >= 6
ASSYM(PCB_TPIDRURW, offsetof(struct pcb, pcb_regs.sf_tpidrurw));
-#endif
ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
@@ -97,24 +86,12 @@ ASSYM(M_DATA, offsetof(struct mbuf, m_data));
ASSYM(M_NEXT, offsetof(struct mbuf, m_next));
ASSYM(IP_SRC, offsetof(struct ip, ip_src));
ASSYM(IP_DST, offsetof(struct ip, ip_dst));
-#if __ARM_ARCH < 6
-ASSYM(CF_CONTEXT_SWITCH, offsetof(struct cpu_functions, cf_context_switch));
-ASSYM(CF_DCACHE_WB_RANGE, offsetof(struct cpu_functions, cf_dcache_wb_range));
-ASSYM(CF_IDCACHE_WBINV_ALL, offsetof(struct cpu_functions, cf_idcache_wbinv_all));
-ASSYM(CF_L2CACHE_WBINV_ALL, offsetof(struct cpu_functions, cf_l2cache_wbinv_all));
-ASSYM(CF_TLB_FLUSHID_SE, offsetof(struct cpu_functions, cf_tlb_flushID_SE));
-#endif
ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
ASSYM(TD_PROC, offsetof(struct thread, td_proc));
ASSYM(TD_MD, offsetof(struct thread, td_md));
ASSYM(TD_LOCK, offsetof(struct thread, td_lock));
-#if __ARM_ARCH < 6
-ASSYM(MD_TP, offsetof(struct mdthread, md_tp));
-ASSYM(MD_RAS_START, offsetof(struct mdthread, md_ras_start));
-ASSYM(MD_RAS_END, offsetof(struct mdthread, md_ras_end));
-#endif
ASSYM(TF_SPSR, offsetof(struct trapframe, tf_spsr));
ASSYM(TF_R0, offsetof(struct trapframe, tf_r0));
@@ -125,28 +102,17 @@ ASSYM(P_FLAG, offsetof(struct proc, p_flag));
ASSYM(SIGF_UC, offsetof(struct sigframe, sf_uc));
-#if __ARM_ARCH < 6
-ASSYM(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
-ASSYM(ARM_RAS_START, ARM_RAS_START);
-ASSYM(ARM_RAS_END, ARM_RAS_END);
-#endif
-
#ifdef VFP
ASSYM(PCB_VFPSTATE, offsetof(struct pcb, pcb_vfpstate));
#endif
-#if __ARM_ARCH >= 6
ASSYM(PC_CURPMAP, offsetof(struct pcpu, pc_curpmap));
ASSYM(PC_BP_HARDEN_KIND, offsetof(struct pcpu, pc_bp_harden_kind));
ASSYM(PCPU_BP_HARDEN_KIND_NONE, PCPU_BP_HARDEN_KIND_NONE);
ASSYM(PCPU_BP_HARDEN_KIND_BPIALL, PCPU_BP_HARDEN_KIND_BPIALL);
ASSYM(PCPU_BP_HARDEN_KIND_ICIALLU, PCPU_BP_HARDEN_KIND_ICIALLU);
-#endif
ASSYM(PAGE_SIZE, PAGE_SIZE);
-#if __ARM_ARCH < 6
-ASSYM(PMAP_DOMAIN_KERNEL, PMAP_DOMAIN_KERNEL);
-#endif
#ifdef PMAP_INCLUDE_PTE_SYNC
ASSYM(PMAP_INCLUDE_PTE_SYNC, 1);
#endif
Modified: head/sys/arm/arm/machdep.c
==============================================================================
--- head/sys/arm/arm/machdep.c Sun Nov 29 01:43:04 2020 (r368140)
+++ head/sys/arm/arm/machdep.c Sun Nov 29 08:40:12 2020 (r368141)
@@ -106,9 +106,6 @@ __FBSDID("$FreeBSD$");
#error FreeBSD/arm doesn't provide compatibility with releases prior to 10
#endif
-#if __ARM_ARCH >= 6 && !defined(INTRNG)
-#error armv6 requires INTRNG
-#endif
#ifndef _ARM_ARCH_5E
#error FreeBSD requires ARMv5 or later
@@ -134,26 +131,10 @@ extern int *end;
#ifdef FDT
vm_paddr_t pmap_pa;
-#if __ARM_ARCH >= 6
vm_offset_t systempage;
vm_offset_t irqstack;
vm_offset_t undstack;
vm_offset_t abtstack;
-#else
-/*
- * This is the number of L2 page tables required for covering max
- * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
- * stacks etc.), uprounded to be divisible by 4.
- */
-#define KERNEL_PT_MAX 78
-static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
-struct pv_addr systempage;
-static struct pv_addr msgbufpv;
-struct pv_addr irqstack;
-struct pv_addr undstack;
-struct pv_addr abtstack;
-static struct pv_addr kernelstack;
-#endif /* __ARM_ARCH >= 6 */
#endif /* FDT */
#ifdef PLATFORM
@@ -197,22 +178,6 @@ arm_vector_init(vm_offset_t va, int which)
icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int));
vector_page = va;
-#if __ARM_ARCH < 6
- if (va == ARM_VECTORS_HIGH) {
- /*
- * Enable high vectors in the system control reg (SCTLR).
- *
- * Assume the MD caller knows what it's doing here, and really
- * does want the vector page relocated.
- *
- * Note: This has to be done here (and not just in
- * cpu_setup()) because the vector page needs to be
- * accessible *before* cpu_startup() is called.
- * Think ddb(9) ...
- */
- cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
- }
-#endif
}
static void
@@ -220,9 +185,6 @@ cpu_startup(void *dummy)
{
struct pcb *pcb = thread0.td_pcb;
const unsigned int mbyte = 1024 * 1024;
-#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE)
- vm_page_t m;
-#endif
identify_arm_cpu();
@@ -247,19 +209,6 @@ cpu_startup(void *dummy)
pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack +
USPACE_SVC_STACK_TOP;
pmap_set_pcb_pagedir(kernel_pmap, pcb);
-#if __ARM_ARCH < 6
- vector_page_setprot(VM_PROT_READ);
- pmap_postinit();
-#ifdef ARM_CACHE_LOCK_ENABLE
- pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
- arm_lock_cache_line(ARM_TP_ADDRESS);
-#else
- m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
- pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
-#endif
- *(uint32_t *)ARM_RAS_START = 0;
- *(uint32_t *)ARM_RAS_END = 0xffffffff;
-#endif
}
SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
@@ -279,7 +228,6 @@ cpu_flush_dcache(void *ptr, size_t len)
int
cpu_est_clockrate(int cpu_id, uint64_t *rate)
{
-#if __ARM_ARCH >= 6
struct pcpu *pc;
pc = pcpu_find(cpu_id);
@@ -292,9 +240,6 @@ cpu_est_clockrate(int cpu_id, uint64_t *rate)
*rate = pc->pc_clock;
return (0);
-#else
- return (ENXIO);
-#endif
}
void
@@ -737,9 +682,7 @@ makectx(struct trapframe *tf, struct pcb *pcb)
void
pcpu0_init(void)
{
-#if __ARM_ARCH >= 6
set_curthread(&thread0);
-#endif
pcpu_init(pcpup, 0, sizeof(struct pcpu));
PCPU_SET(curthread, &thread0);
}
@@ -762,7 +705,6 @@ init_proc0(vm_offset_t kstack)
pcpup->pc_curpcb = thread0.td_pcb;
}
-#if __ARM_ARCH >= 6
void
set_stackptrs(int cpu)
{
@@ -774,20 +716,7 @@ set_stackptrs(int cpu)
set_stackptr(PSR_UND32_MODE,
undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
}
-#else
-void
-set_stackptrs(int cpu)
-{
- set_stackptr(PSR_IRQ32_MODE,
- irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
- set_stackptr(PSR_ABT32_MODE,
- abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
- set_stackptr(PSR_UND32_MODE,
- undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
-}
-#endif
-
static void
arm_kdb_init(void)
{
@@ -800,290 +729,10 @@ arm_kdb_init(void)
}
#ifdef FDT
-#if __ARM_ARCH < 6
void *
initarm(struct arm_boot_params *abp)
{
struct mem_region mem_regions[FDT_MEM_REGIONS];
- struct pv_addr kernel_l1pt;
- struct pv_addr dpcpu;
- vm_offset_t dtbp, freemempos, l2_start, lastaddr;
- uint64_t memsize;
- uint32_t l2size;
- char *env;
- void *kmdp;
- u_int l1pagetable;
- int i, j, err_devmap, mem_regions_sz;
-
- lastaddr = parse_boot_param(abp);
- arm_physmem_kernaddr = abp->abp_physaddr;
-
- memsize = 0;
-
- cpuinfo_init();
- set_cpufuncs();
-
- /*
- * Find the dtb passed in by the boot loader.
- */
- kmdp = preload_search_by_type("elf kernel");
- if (kmdp != NULL)
- dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
- else
- dtbp = (vm_offset_t)NULL;
-
-#if defined(FDT_DTB_STATIC)
- /*
- * In case the device tree blob was not retrieved (from metadata) try
- * to use the statically embedded one.
- */
- if (dtbp == (vm_offset_t)NULL)
- dtbp = (vm_offset_t)&fdt_static_dtb;
-#endif
-
- if (OF_install(OFW_FDT, 0) == FALSE)
- panic("Cannot install FDT");
-
- if (OF_init((void *)dtbp) != 0)
- panic("OF_init failed with the found device tree");
-
- /* Grab physical memory regions information from device tree. */
- if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0)
- panic("Cannot get physical memory regions");
- physmem_hardware_regions(mem_regions, mem_regions_sz);
-
- /* Grab reserved memory regions information from device tree. */
- if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0)
- physmem_exclude_regions(mem_regions, mem_regions_sz,
- EXFLAG_NODUMP | EXFLAG_NOALLOC);
-
- /* Platform-specific initialisation */
- platform_probe_and_attach();
-
- pcpu0_init();
-
- /* Do basic tuning, hz etc */
- init_param1();
-
- /* Calculate number of L2 tables needed for mapping vm_page_array */
- l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
- l2size = (l2size >> L1_S_SHIFT) + 1;
-
- /*
- * Add one table for end of kernel map, one for stacks, msgbuf and
- * L1 and L2 tables map, one for vectors map and two for
- * l2 structures from pmap_bootstrap.
- */
- l2size += 5;
-
- /* Make it divisible by 4 */
- l2size = (l2size + 3) & ~3;
-
- freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
-
- /* Define a macro to simplify memory allocation */
-#define valloc_pages(var, np) \
- alloc_pages((var).pv_va, (np)); \
- (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
-
-#define alloc_pages(var, np) \
- (var) = freemempos; \
- freemempos += (np * PAGE_SIZE); \
- memset((char *)(var), 0, ((np) * PAGE_SIZE));
-
- while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
- freemempos += PAGE_SIZE;
- valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
-
- for (i = 0, j = 0; i < l2size; ++i) {
- if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
- valloc_pages(kernel_pt_table[i],
- L2_TABLE_SIZE / PAGE_SIZE);
- j = i;
- } else {
- kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
- L2_TABLE_SIZE_REAL * (i - j);
- kernel_pt_table[i].pv_pa =
- kernel_pt_table[i].pv_va - KERNVIRTADDR +
- abp->abp_physaddr;
- }
- }
- /*
- * Allocate a page for the system page mapped to 0x00000000
- * or 0xffff0000. This page will just contain the system vectors
- * and can be shared by all processes.
- */
- valloc_pages(systempage, 1);
-
- /* Allocate dynamic per-cpu area. */
- valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
- dpcpu_init((void *)dpcpu.pv_va, 0);
-
- /* Allocate stacks for all modes */
- valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
- valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
- valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
- valloc_pages(kernelstack, kstack_pages);
- valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
-
- /*
- * Now we start construction of the L1 page table
- * We start by mapping the L2 page tables into the L1.
- * This means that we can replace L1 mappings later on if necessary
- */
- l1pagetable = kernel_l1pt.pv_va;
-
- /*
- * Try to map as much as possible of kernel text and data using
- * 1MB section mapping and for the rest of initial kernel address
- * space use L2 coarse tables.
- *
- * Link L2 tables for mapping remainder of kernel (modulo 1MB)
- * and kernel structures
- */
- l2_start = lastaddr & ~(L1_S_OFFSET);
- for (i = 0 ; i < l2size - 1; i++)
- pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
- &kernel_pt_table[i]);
-
- pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
-
- /* Map kernel code and data */
- pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr,
- (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-
- /* Map L1 directory and allocated L2 page tables */
- pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
- L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
-
- pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
- kernel_pt_table[0].pv_pa,
- L2_TABLE_SIZE_REAL * l2size,
- VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
-
- /* Map allocated DPCPU, stacks and msgbuf */
- pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
- freemempos - dpcpu.pv_va,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-
- /* Link and map the vector page */
- pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
- &kernel_pt_table[l2size - 1]);
- pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
- VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
-
- /* Establish static device mappings. */
- err_devmap = platform_devmap_init();
- devmap_bootstrap(l1pagetable, NULL);
- vm_max_kernel_address = platform_lastaddr();
-
- cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
- pmap_pa = kernel_l1pt.pv_pa;
- cpu_setttb(kernel_l1pt.pv_pa);
- cpu_tlb_flushID();
- cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
-
- /*
- * Now that proper page tables are installed, call cpu_setup() to enable
- * instruction and data caches and other chip-specific features.
- */
- cpu_setup();
-
- /*
- * Only after the SOC registers block is mapped we can perform device
- * tree fixups, as they may attempt to read parameters from hardware.
- */
- OF_interpret("perform-fixup", 0);
-
- platform_gpio_init();
-
- cninit();
-
- debugf("initarm: console initialized\n");
- debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
- debugf(" boothowto = 0x%08x\n", boothowto);
- debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
- arm_print_kenv();
-
- /*
- * Dump the boot metadata. We have to wait for cninit() since console
- * output is required. If it's grossly incorrect the kernel will never
- * make it this far.
- */
- if (getenv_is_true("debug.dump_modinfo_at_boot"))
- preload_dump();
-
- env = kern_getenv("kernelname");
- if (env != NULL) {
- strlcpy(kernelname, env, sizeof(kernelname));
- freeenv(env);
- }
-
- if (err_devmap != 0)
- printf("WARNING: could not fully configure devmap, error=%d\n",
- err_devmap);
-
- platform_late_init();
-
- /*
- * Pages were allocated during the secondary bootstrap for the
- * stacks for different CPU modes.
- * We must now set the r13 registers in the different CPU modes to
- * point to these stacks.
- * Since the ARM stacks use STMFD etc. we must set r13 to the top end
- * of the stack memory.
- */
- cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
-
- set_stackptrs(0);
-
- /*
- * We must now clean the cache again....
- * Cleaning may be done by reading new data to displace any
- * dirty data in the cache. This will have happened in cpu_setttb()
- * but since we are boot strapping the addresses used for the read
- * may have just been remapped and thus the cache could be out
- * of sync. A re-clean after the switch will cure this.
- * After booting there are no gross relocations of the kernel thus
- * this problem will not occur after initarm().
- */
- cpu_idcache_wbinv_all();
-
- undefined_init();
-
- init_proc0(kernelstack.pv_va);
-
- arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
- pmap_bootstrap(freemempos, &kernel_l1pt);
- msgbufp = (void *)msgbufpv.pv_va;
- msgbufinit(msgbufp, msgbufsize);
- mutex_init();
-
- /*
- * Exclude the kernel (and all the things we allocated which immediately
- * follow the kernel) from the VM allocation pool but not from crash
- * dumps. virtual_avail is a global variable which tracks the kva we've
- * "allocated" while setting up pmaps.
- *
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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