svn commit: r367675 - stable/12/sys/dev/ichiic

[Vladimir Kondratyev]

Author: wulf
Date: Sat Nov 14 11:48:28 2020
New Revision: 367675
URL: https://svnweb.freebsd.org/changeset/base/367675

Log:
  MFC r367230:
  
  ig4(4): Add PCI IDs for Intel Comet Lake I2C controllers.

Modified:
  stable/12/sys/dev/ichiic/ig4_pci.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/dev/ichiic/ig4_pci.c
==============================================================================
--- stable/12/sys/dev/ichiic/ig4_pci.c	Sat Nov 14 10:56:40 2020	(r367674)
+++ stable/12/sys/dev/ichiic/ig4_pci.c	Sat Nov 14 11:48:28 2020	(r367675)
@@ -107,6 +107,20 @@ static int ig4iic_pci_detach(device_t dev);
 #define PCI_CHIP_CANNONLAKE_H_I2C_1	0xa3698086
 #define PCI_CHIP_CANNONLAKE_H_I2C_2	0xa36a8086
 #define PCI_CHIP_CANNONLAKE_H_I2C_3	0xa36b8086
+#define PCI_CHIP_COMETLAKE_LP_I2C_0	0x02e88086
+#define PCI_CHIP_COMETLAKE_LP_I2C_1	0x02e98086
+#define PCI_CHIP_COMETLAKE_LP_I2C_2	0x02ea8086
+#define PCI_CHIP_COMETLAKE_LP_I2C_3	0x02eb8086
+#define PCI_CHIP_COMETLAKE_LP_I2C_4	0x02c58086
+#define PCI_CHIP_COMETLAKE_LP_I2C_5	0x02c68086
+#define PCI_CHIP_COMETLAKE_H_I2C_0	0x06e88086
+#define PCI_CHIP_COMETLAKE_H_I2C_1	0x06e98086
+#define PCI_CHIP_COMETLAKE_H_I2C_2	0x06ea8086
+#define PCI_CHIP_COMETLAKE_H_I2C_3	0x06eb8086
+#define PCI_CHIP_COMETLAKE_V_I2C_0	0xa3e08086
+#define PCI_CHIP_COMETLAKE_V_I2C_1	0xa3e18086
+#define PCI_CHIP_COMETLAKE_V_I2C_2	0xa3e28086
+#define PCI_CHIP_COMETLAKE_V_I2C_3	0xa3e38086
 
 struct ig4iic_pci_device {
 	uint32_t	devid;
@@ -156,6 +170,20 @@ static struct ig4iic_pci_device ig4iic_pci_devices[] =
 	{ PCI_CHIP_CANNONLAKE_H_I2C_1, "Intel Cannon Lake-H I2C Controller-1", IG4_CANNONLAKE},
 	{ PCI_CHIP_CANNONLAKE_H_I2C_2, "Intel Cannon Lake-H I2C Controller-2", IG4_CANNONLAKE},
 	{ PCI_CHIP_CANNONLAKE_H_I2C_3, "Intel Cannon Lake-H I2C Controller-3", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_LP_I2C_0, "Intel Comet Lake-LP I2C Controller-0", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_LP_I2C_1, "Intel Comet Lake-LP I2C Controller-1", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_LP_I2C_2, "Intel Comet Lake-LP I2C Controller-2", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_LP_I2C_3, "Intel Comet Lake-LP I2C Controller-3", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_LP_I2C_4, "Intel Comet Lake-LP I2C Controller-4", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_LP_I2C_5, "Intel Comet Lake-LP I2C Controller-5", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_H_I2C_0, "Intel Comet Lake-H I2C Controller-0", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_H_I2C_1, "Intel Comet Lake-H I2C Controller-1", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_H_I2C_2, "Intel Comet Lake-H I2C Controller-2", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_H_I2C_3, "Intel Comet Lake-H I2C Controller-3", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_V_I2C_0, "Intel Comet Lake-V I2C Controller-0", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_V_I2C_1, "Intel Comet Lake-V I2C Controller-1", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_V_I2C_2, "Intel Comet Lake-V I2C Controller-2", IG4_CANNONLAKE},
+	{ PCI_CHIP_COMETLAKE_V_I2C_3, "Intel Comet Lake-V I2C Controller-3", IG4_CANNONLAKE},
 };
 
 static int