svn commit: r360812 - head/sys/amd64/amd64
Mark Johnston
markj at FreeBSD.org
Fri May 8 14:38:49 UTC 2020
Author: markj
Date: Fri May 8 14:38:48 2020
New Revision: 360812
URL: https://svnweb.freebsd.org/changeset/base/360812
Log:
Reinitialize thread0's stack base after enabling XSAVE.
Otherwise the initial call to set_top_of_stack(), which occurs before
fpuinit() sets the correct value for cpu_max_ext_state_size, leaves the
stack base at an incorrect location. Then, when the full area is
zeroed, we end up erroneously zeroing part of the following page.
Reviewed by: kib
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D24754
Modified:
head/sys/amd64/amd64/machdep.c
Modified: head/sys/amd64/amd64/machdep.c
==============================================================================
--- head/sys/amd64/amd64/machdep.c Fri May 8 14:13:30 2020 (r360811)
+++ head/sys/amd64/amd64/machdep.c Fri May 8 14:38:48 2020 (r360812)
@@ -1857,7 +1857,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
#endif
#else
-#error "have you forgotten the isa device?";
+#error "have you forgotten the isa device?"
#endif
if (late_console)
@@ -1867,12 +1867,13 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
fpuinit();
/*
- * Set up thread0 pcb save area after fpuinit calculated fpu save
- * area size. Zero out the extended state header in fpu save
- * area.
+ * Reinitialize thread0's stack base now that the xsave area size is
+ * known. Set up thread0's pcb save area after fpuinit calculated fpu
+ * save area size. Zero out the extended state header in fpu save area.
*/
+ set_top_of_stack_td(&thread0);
thread0.td_pcb->pcb_save = get_pcb_user_save_td(&thread0);
- bzero(get_pcb_user_save_td(&thread0), cpu_max_ext_state_size);
+ bzero(thread0.td_pcb->pcb_save, cpu_max_ext_state_size);
if (use_xsave) {
xhdr = (struct xstate_hdr *)(get_pcb_user_save_td(&thread0) +
1);
@@ -1882,7 +1883,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
rsp0 = thread0.td_md.md_stack_base;
/* Ensure the stack is aligned to 16 bytes */
rsp0 &= ~0xFul;
- __pcpu[0].pc_common_tss.tss_rsp0 = rsp0;
+ PCPU_PTR(common_tss)->tss_rsp0 = rsp0;
amd64_bsp_pcpu_init2(rsp0);
/* transfer to user mode */
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