svn commit: r345158 - head/usr.sbin/bhyve

Rodney W. Grimes freebsd at gndrsh.dnsmgr.net
Fri Mar 15 01:42:46 UTC 2019


> Author: cem
> Date: Thu Mar 14 21:08:48 2019
> New Revision: 345158
> URL: https://svnweb.freebsd.org/changeset/base/345158
> 
> Log:
>   bhyve(8): Fix uart emulation bug
>   
>   THRE is always asserted in LSR reads, so REG_IER writes that raise
>   IER_ETXRDY must also set thre_int_pending.
>   
>   Reported by:	Illumos, according to emaste@
>   		https://twitter.com/ed_maste/status/1106195949087584258
>   MFC after:	2 weeks

Per MAINTAINERS this should of had a formal review.
And this is already in process from Patrick Mooney
via the bhyve developemnt group.
Revert this please.


> Modified:
>   head/usr.sbin/bhyve/uart_emul.c
> 
> Modified: head/usr.sbin/bhyve/uart_emul.c
> ==============================================================================
> --- head/usr.sbin/bhyve/uart_emul.c	Thu Mar 14 20:32:48 2019	(r345157)
> +++ head/usr.sbin/bhyve/uart_emul.c	Thu Mar 14 21:08:48 2019	(r345158)
> @@ -431,6 +431,9 @@ uart_write(struct uart_softc *sc, int offset, uint8_t 
>  		sc->thre_int_pending = true;
>  		break;
>  	case REG_IER:
> +		/* Set pending when IER_ETXRDY is raised (edge-triggered). */
> +		if ((sc->ier & IER_ETXRDY) == 0 && (value & IER_ETXRDY) != 0)
> +			sc->thre_int_pending = true;
>  		/*
>  		 * Apply mask so that bits 4-7 are 0
>  		 * Also enables bits 0-3 only if they're 1

-- 
Rod Grimes                                                 rgrimes at freebsd.org


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