svn commit: r348942 - in vendor/lld/dist-release_80: COFF ELF ELF/Arch test/COFF test/ELF wasm
Dimitry Andric
dim at FreeBSD.org
Tue Jun 11 18:17:33 UTC 2019
Author: dim
Date: Tue Jun 11 18:17:23 2019
New Revision: 348942
URL: https://svnweb.freebsd.org/changeset/base/348942
Log:
Vendor import of lld release_80 branch r363030:
https://llvm.org/svn/llvm-project/lld/branches/release_80@363030
Added:
vendor/lld/dist-release_80/test/COFF/guardcf-thunk.s
vendor/lld/dist-release_80/test/ELF/compressed-input-alignment.test
vendor/lld/dist-release_80/test/ELF/emit-relocs-mergeable2.s
vendor/lld/dist-release_80/test/ELF/ppc64-local-entry.s
vendor/lld/dist-release_80/test/ELF/ppc64-long-branch-init.s
Modified:
vendor/lld/dist-release_80/COFF/Writer.cpp
vendor/lld/dist-release_80/ELF/Arch/PPC64.cpp
vendor/lld/dist-release_80/ELF/InputSection.cpp
vendor/lld/dist-release_80/ELF/SyntheticSections.cpp
vendor/lld/dist-release_80/ELF/Writer.cpp
vendor/lld/dist-release_80/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
vendor/lld/dist-release_80/test/ELF/aarch64-tls-gdle.s
vendor/lld/dist-release_80/test/ELF/aarch64-tls-iele.s
vendor/lld/dist-release_80/test/ELF/aarch64-tls-le.s
vendor/lld/dist-release_80/test/ELF/aarch64-tlsld-ldst.s
vendor/lld/dist-release_80/test/ELF/arm-tls-le32.s
vendor/lld/dist-release_80/test/ELF/arm-tls-norelax-ie-le.s
vendor/lld/dist-release_80/test/ELF/eh-frame-hdr-augmentation.s
vendor/lld/dist-release_80/test/ELF/gc-sections-metadata-startstop.s
vendor/lld/dist-release_80/test/ELF/mips-micro-relocs.s
vendor/lld/dist-release_80/test/ELF/mips-micror6-relocs.s
vendor/lld/dist-release_80/test/ELF/ppc64-bsymbolic-toc-restore.s
vendor/lld/dist-release_80/test/ELF/ppc64-call-reach.s
vendor/lld/dist-release_80/test/ELF/ppc64-ifunc.s
vendor/lld/dist-release_80/test/ELF/ppc64-local-dynamic.s
vendor/lld/dist-release_80/test/ELF/ppc64-plt-stub.s
vendor/lld/dist-release_80/test/ELF/ppc64-rel-calls.s
vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore-recursive-call.s
vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore.s
vendor/lld/dist-release_80/wasm/OutputSections.cpp
Modified: vendor/lld/dist-release_80/COFF/Writer.cpp
==============================================================================
--- vendor/lld/dist-release_80/COFF/Writer.cpp Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/COFF/Writer.cpp Tue Jun 11 18:17:23 2019 (r348942)
@@ -1351,19 +1351,47 @@ static void addSymbolToRVASet(SymbolRVASet &RVASet, De
// symbol in an executable section.
static void maybeAddAddressTakenFunction(SymbolRVASet &AddressTakenSyms,
Symbol *S) {
- auto *D = dyn_cast_or_null<DefinedCOFF>(S);
-
- // Ignore undefined symbols and references to non-functions (e.g. globals and
- // labels).
- if (!D ||
- D->getCOFFSymbol().getComplexType() != COFF::IMAGE_SYM_DTYPE_FUNCTION)
+ if (!S)
return;
- // Mark the symbol as address taken if it's in an executable section.
- Chunk *RefChunk = D->getChunk();
- OutputSection *OS = RefChunk ? RefChunk->getOutputSection() : nullptr;
- if (OS && OS->Header.Characteristics & IMAGE_SCN_MEM_EXECUTE)
- addSymbolToRVASet(AddressTakenSyms, D);
+ switch (S->kind()) {
+ case Symbol::DefinedLocalImportKind:
+ case Symbol::DefinedImportDataKind:
+ // Defines an __imp_ pointer, so it is data, so it is ignored.
+ break;
+ case Symbol::DefinedCommonKind:
+ // Common is always data, so it is ignored.
+ break;
+ case Symbol::DefinedAbsoluteKind:
+ case Symbol::DefinedSyntheticKind:
+ // Absolute is never code, synthetic generally isn't and usually isn't
+ // determinable.
+ break;
+ case Symbol::LazyKind:
+ case Symbol::UndefinedKind:
+ // Undefined symbols resolve to zero, so they don't have an RVA. Lazy
+ // symbols shouldn't have relocations.
+ break;
+
+ case Symbol::DefinedImportThunkKind:
+ // Thunks are always code, include them.
+ addSymbolToRVASet(AddressTakenSyms, cast<Defined>(S));
+ break;
+
+ case Symbol::DefinedRegularKind: {
+ // This is a regular, defined, symbol from a COFF file. Mark the symbol as
+ // address taken if the symbol type is function and it's in an executable
+ // section.
+ auto *D = cast<DefinedRegular>(S);
+ if (D->getCOFFSymbol().getComplexType() == COFF::IMAGE_SYM_DTYPE_FUNCTION) {
+ Chunk *RefChunk = D->getChunk();
+ OutputSection *OS = RefChunk ? RefChunk->getOutputSection() : nullptr;
+ if (OS && OS->Header.Characteristics & IMAGE_SCN_MEM_EXECUTE)
+ addSymbolToRVASet(AddressTakenSyms, D);
+ }
+ break;
+ }
+ }
}
// Visit all relocations from all section contributions of this object file and
Modified: vendor/lld/dist-release_80/ELF/Arch/PPC64.cpp
==============================================================================
--- vendor/lld/dist-release_80/ELF/Arch/PPC64.cpp Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/ELF/Arch/PPC64.cpp Tue Jun 11 18:17:23 2019 (r348942)
@@ -113,6 +113,7 @@ class PPC64 final : public TargetInfo { (public)
void writeGotHeader(uint8_t *Buf) const override;
bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
uint64_t BranchAddr, const Symbol &S) const override;
+ uint32_t getThunkSectionSpacing() const override;
bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override;
RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
RelExpr Expr) const override;
@@ -757,6 +758,14 @@ bool PPC64::needsThunk(RelExpr Expr, RelType Type, con
// If the offset exceeds the range of the branch type then it will need
// a range-extending thunk.
return !inBranchRange(Type, BranchAddr, S.getVA());
+}
+
+uint32_t PPC64::getThunkSectionSpacing() const {
+ // See comment in Arch/ARM.cpp for a more detailed explanation of
+ // getThunkSectionSpacing(). For PPC64 we pick the constant here based on
+ // R_PPC64_REL24, which is used by unconditional branch instructions.
+ // 0x2000000 = (1 << 24-1) * 4
+ return 0x2000000;
}
bool PPC64::inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const {
Modified: vendor/lld/dist-release_80/ELF/InputSection.cpp
==============================================================================
--- vendor/lld/dist-release_80/ELF/InputSection.cpp Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/ELF/InputSection.cpp Tue Jun 11 18:17:23 2019 (r348942)
@@ -248,6 +248,7 @@ void InputSectionBase::parseCompressedHeader() {
}
UncompressedSize = Hdr->ch_size;
+ Alignment = std::max<uint64_t>(Hdr->ch_addralign, 1);
RawData = RawData.slice(sizeof(*Hdr));
return;
}
@@ -265,6 +266,7 @@ void InputSectionBase::parseCompressedHeader() {
}
UncompressedSize = Hdr->ch_size;
+ Alignment = std::max<uint64_t>(Hdr->ch_addralign, 1);
RawData = RawData.slice(sizeof(*Hdr));
}
@@ -578,10 +580,6 @@ static int64_t getTlsTpOffset() {
// Variant 1. The thread pointer points to a TCB with a fixed 2-word size,
// followed by a variable amount of alignment padding, followed by the TLS
// segment.
- //
- // NB: While the ARM/AArch64 ABI formally has a 2-word TCB size, lld
- // effectively increases the TCB size to 8 words for Android compatibility.
- // It accomplishes this by increasing the segment's alignment.
return alignTo(Config->Wordsize * 2, Out::TlsPhdr->p_align);
case EM_386:
case EM_X86_64:
Modified: vendor/lld/dist-release_80/ELF/SyntheticSections.cpp
==============================================================================
--- vendor/lld/dist-release_80/ELF/SyntheticSections.cpp Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/ELF/SyntheticSections.cpp Tue Jun 11 18:17:23 2019 (r348942)
@@ -2001,6 +2001,11 @@ template <class ELFT> void SymbolTableSection<ELFT>::w
ESym->setVisibility(Sym->Visibility);
}
+ // The 3 most significant bits of st_other are used by OpenPOWER ABI.
+ // See getPPC64GlobalEntryToLocalEntryOffset() for more details.
+ if (Config->EMachine == EM_PPC64)
+ ESym->st_other |= Sym->StOther & 0xe0;
+
ESym->st_name = Ent.StrTabOffset;
ESym->st_shndx = getSymSectionIndex(Ent.Sym);
Modified: vendor/lld/dist-release_80/ELF/Writer.cpp
==============================================================================
--- vendor/lld/dist-release_80/ELF/Writer.cpp Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/ELF/Writer.cpp Tue Jun 11 18:17:23 2019 (r348942)
@@ -547,6 +547,11 @@ static bool shouldKeepInSymtab(SectionBase *Sec, Strin
if (Config->Discard == DiscardPolicy::None)
return true;
+ // If -emit-reloc is given, all symbols including local ones need to be
+ // copied because they may be referenced by relocations.
+ if (Config->EmitRelocs)
+ return true;
+
// In ELF assembly .L symbols are normally discarded by the assembler.
// If the assembler fails to do so, the linker discards them if
// * --discard-locals is used.
@@ -2192,17 +2197,6 @@ template <class ELFT> void Writer<ELFT>::setPhdrs() {
}
if (P->p_type == PT_TLS && P->p_memsz) {
- if (!Config->Shared &&
- (Config->EMachine == EM_ARM || Config->EMachine == EM_AARCH64)) {
- // On ARM/AArch64, reserve extra space (8 words) between the thread
- // pointer and an executable's TLS segment by overaligning the segment.
- // This reservation is needed for backwards compatibility with Android's
- // TCB, which allocates several slots after the thread pointer (e.g.
- // TLS_SLOT_STACK_GUARD==5). For simplicity, this overalignment is also
- // done on other operating systems.
- P->p_align = std::max<uint64_t>(P->p_align, Config->Wordsize * 8);
- }
-
// The TLS pointer goes after PT_TLS for variant 2 targets. At least glibc
// will align it, so round up the size to make sure the offsets are
// correct.
Added: vendor/lld/dist-release_80/test/COFF/guardcf-thunk.s
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor/lld/dist-release_80/test/COFF/guardcf-thunk.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -0,0 +1,43 @@
+# REQUIRES: x86
+
+# Make a DLL that exports exportfn1.
+# RUN: yaml2obj < %p/Inputs/export.yaml > %t.obj
+# RUN: lld-link /out:%t.dll /dll %t.obj /export:exportfn1 /implib:%t.lib
+
+# Make an obj that takes the address of that exported function.
+# RUN: llvm-mc -filetype=obj -triple=x86_64-windows-msvc %s -o %t2.obj
+# RUN: lld-link -entry:main -guard:cf %t2.obj %t.lib -nodefaultlib -out:%t.exe
+# RUN: llvm-readobj -coff-load-config %t.exe | FileCheck %s
+
+# Check that the gfids table contains *exactly* two entries, one for exportfn1
+# and one for main.
+# CHECK: GuardFidTable [
+# CHECK-NEXT: 0x{{[0-9A-Fa-f]+0$}}
+# CHECK-NEXT: 0x{{[0-9A-Fa-f]+0$}}
+# CHECK-NEXT: ]
+
+
+ .def @feat.00;
+ .scl 3;
+ .type 0;
+ .endef
+ .globl @feat.00
+ at feat.00 = 0x001
+
+ .section .text,"rx"
+ .def main; .scl 2; .type 32; .endef
+ .global main
+main:
+ leaq exportfn1(%rip), %rax
+ retq
+
+ .section .rdata,"dr"
+.globl _load_config_used
+_load_config_used:
+ .long 256
+ .fill 124, 1, 0
+ .quad __guard_fids_table
+ .quad __guard_fids_count
+ .long __guard_flags
+ .fill 128, 1, 0
+
Modified: vendor/lld/dist-release_80/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -26,9 +26,9 @@ _start:
// CHECK: _start:
// CHECK-NEXT: 210ff8: 41 d0 3b d5 mrs x1, TPIDR_EL0
// CHECK-NEXT: 210ffc: 00 00 a0 d2 movz x0, #0, lsl #16
-// CHECK-NEXT: 211000: 01 08 80 f2 movk x1, #64
+// CHECK-NEXT: 211000: 01 02 80 f2 movk x1, #16
// CHECK-NEXT: 211004: 00 00 a0 d2 movz x0, #0, lsl #16
-// CHECK-NEXT: 211008: 01 08 80 f2 movk x1, #64
+// CHECK-NEXT: 211008: 01 02 80 f2 movk x1, #16
// CHECK-NEXT: 21100c: c0 03 5f d6 ret
.type v, at object
Modified: vendor/lld/dist-release_80/test/ELF/aarch64-tls-gdle.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/aarch64-tls-gdle.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/aarch64-tls-gdle.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -9,11 +9,11 @@
#RELOC: Relocations [
#RELOC-NEXT: ]
-# TCB size = 64 and foo is first element from TLS register.
+# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK: _start:
# CHECK: 210000: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK: 210004: 00 08 80 f2 movk x0, #64
+# CHECK: 210004: 00 02 80 f2 movk x0, #16
# CHECK: 210008: 1f 20 03 d5 nop
# CHECK: 21000c: 1f 20 03 d5 nop
Modified: vendor/lld/dist-release_80/test/ELF/aarch64-tls-iele.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/aarch64-tls-iele.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/aarch64-tls-iele.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -9,13 +9,13 @@
# RELOC: Relocations [
# RELOC-NEXT: ]
-# TCB size = 64 and foo is first element from TLS register.
+# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK: _start:
# CHECK-NEXT: 210000: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK-NEXT: 210004: 80 08 80 f2 movk x0, #68
+# CHECK-NEXT: 210004: 80 02 80 f2 movk x0, #20
# CHECK-NEXT: 210008: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK-NEXT: 21000c: 00 08 80 f2 movk x0, #64
+# CHECK-NEXT: 21000c: 00 02 80 f2 movk x0, #16
.section .tdata
.align 2
Modified: vendor/lld/dist-release_80/test/ELF/aarch64-tls-le.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/aarch64-tls-le.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/aarch64-tls-le.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -17,12 +17,12 @@ _start:
add x0, x0, :tprel_hi12:v2
add x0, x0, :tprel_lo12_nc:v2
-# TCB size = 64 and foo is first element from TLS register.
+# TCB size = 0x16 and foo is first element from TLS register.
#CHECK: Disassembly of section .text:
#CHECK: _start:
#CHECK: 210000: 40 d0 3b d5 mrs x0, TPIDR_EL0
#CHECK: 210004: 00 00 40 91 add x0, x0, #0, lsl #12
-#CHECK: 210008: 00 00 01 91 add x0, x0, #64
+#CHECK: 210008: 00 40 00 91 add x0, x0, #16
#CHECK: 21000c: 40 d0 3b d5 mrs x0, TPIDR_EL0
#CHECK: 210010: 00 fc 7f 91 add x0, x0, #4095, lsl #12
#CHECK: 210014: 00 e0 3f 91 add x0, x0, #4088
@@ -36,9 +36,9 @@ v1:
.word 0
.size v1, 4
-# The current offset from the thread pointer is 68. Raise it to just below the
+# The current offset from the thread pointer is 20. Raise it to just below the
# 24-bit limit.
-.space (0xfffff8 - 68)
+.space (0xfffff8 - 20)
.type v2, at object
.globl v2
Modified: vendor/lld/dist-release_80/test/ELF/aarch64-tlsld-ldst.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/aarch64-tlsld-ldst.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/aarch64-tlsld-ldst.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -26,27 +26,27 @@ _start: mrs x8, TPIDR_EL0
// CHECK: _start:
// CHECK-NEXT: 210000: 48 d0 3b d5 mrs x8, TPIDR_EL0
-// 0x0 + c40 = 0xc40 = tcb (64-bytes) + var0
-// CHECK-NEXT: 210004: 08 01 40 91 add x8, x8, #0, lsl #12
-// CHECK-NEXT: 210008: 14 11 c3 3d ldr q20, [x8, #3136]
-// 0x1000 + 0x850 = 0x1850 = tcb + var1
-// CHECK-NEXT: 21000c: 08 05 40 91 add x8, x8, #1, lsl #12
-// CHECK-NEXT: 210010: 00 29 44 f9 ldr x0, [x8, #2128]
-// 0x2000 + 0x458 = 0x2458 = tcb + var2
-// CHECK-NEXT: 210014: 08 09 40 91 add x8, x8, #2, lsl #12
-// CHECK-NEXT: 210018: 00 59 44 b9 ldr w0, [x8, #1112]
-// 0x3000 + 0x5c = 0x305c = tcb + var3
-// CHECK-NEXT: 21001c: 08 0d 40 91 add x8, x8, #3, lsl #12
-// CHECK-NEXT: 210020: 00 b9 40 79 ldrh w0, [x8, #92]
-// 0x3000 + 0xc5e = 0x3c5e = tcb + var4
-// CHECK-NEXT: 210024: 08 0d 40 91 add x8, x8, #3, lsl #12
-// CHECK-NEXT: 210028: 00 79 71 39 ldrb w0, [x8, #3166]
+// 0x0 + c10 = 0xc10 = tcb (16-bytes) + var0
+// CHECK-NEXT: 210004: 08 01 40 91 add x8, x8, #0, lsl #12
+// CHECK-NEXT: 210008: 14 05 c3 3d ldr q20, [x8, #3088]
+// 0x1000 + 0x820 = 0x1820 = tcb + var1
+// CHECK-NEXT: 21000c: 08 05 40 91 add x8, x8, #1, lsl #12
+// CHECK-NEXT: 210010: 00 11 44 f9 ldr x0, [x8, #2080]
+// 0x2000 + 0x428 = 0x2428 = tcb + var2
+// CHECK-NEXT: 210014: 08 09 40 91 add x8, x8, #2, lsl #12
+// CHECK-NEXT: 210018: 00 29 44 b9 ldr w0, [x8, #1064]
+// 0x3000 + 0x2c = 0x302c = tcb + var3
+// CHECK-NEXT: 21001c: 08 0d 40 91 add x8, x8, #3, lsl #12
+// CHECK-NEXT: 210020: 00 59 40 79 ldrh w0, [x8, #44]
+// 0x3000 + 0xc2e = 0x32ce = tcb + var4
+// CHECK-NEXT: 210024: 08 0d 40 91 add x8, x8, #3, lsl #12
+// CHECK-NEXT: 210028: 00 b9 70 39 ldrb w0, [x8, #3118]
-// CHECK-SYMS: 0000000000000c00 16 TLS GLOBAL DEFAULT 2 var0
-// CHECK-SYMS-NEXT: 0000000000001810 8 TLS GLOBAL DEFAULT 2 var1
-// CHECK-SYMS-NEXT: 0000000000002418 4 TLS GLOBAL DEFAULT 2 var2
-// CHECK-SYMS-NEXT: 000000000000301c 2 TLS GLOBAL DEFAULT 2 var3
-// CHECK-SYMS-NEXT: 0000000000003c1e 1 TLS GLOBAL DEFAULT 2 var4
+// CHECK-SYMS: 0000000000000c00 0 TLS GLOBAL DEFAULT 2 var0
+// CHECK-SYMS-NEXT: 0000000000001810 4 TLS GLOBAL DEFAULT 2 var1
+// CHECK-SYMS-NEXT: 0000000000002418 2 TLS GLOBAL DEFAULT 2 var2
+// CHECK-SYMS-NEXT: 000000000000301c 1 TLS GLOBAL DEFAULT 2 var3
+// CHECK-SYMS-NEXT: 0000000000003c1e 0 TLS GLOBAL DEFAULT 2 var4
.globl var0
.globl var1
@@ -59,12 +59,12 @@ _start: mrs x8, TPIDR_EL0
.type var3, at object
.section .tbss,"awT", at nobits
- .balign 64
+ .balign 16
.space 1024 * 3
var0:
.quad 0
.quad 0
- .size var0, 16
+ .size var1, 16
.space 1024 * 3
var1:
.quad 0
@@ -72,14 +72,14 @@ var1:
.space 1024 * 3
var2:
.word 0
- .size var2, 4
+ .size var1, 4
.space 1024 * 3
var3:
.hword 0
- .size var3, 2
+ .size var2, 2
.space 1024 * 3
var4:
.byte 0
- .size var4, 1
+ .size var3, 1
.space 1024 * 3
Modified: vendor/lld/dist-release_80/test/ELF/arm-tls-le32.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/arm-tls-le32.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/arm-tls-le32.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -69,9 +69,9 @@ x:
// CHECK: Disassembly of section .text:
// CHECK-NEXT: _start:
-// offset of x from Thread pointer = (TcbSize + 0x0 = 0x20)
-// CHECK-NEXT: 11000: 20 00 00 00
-// offset of z from Thread pointer = (TcbSize + 0x8 = 0x28)
-// CHECK-NEXT: 11004: 28 00 00 00
-// offset of y from Thread pointer = (TcbSize + 0x4 = 0x24)
-// CHECK-NEXT: 11008: 24 00 00 00
+// offset of x from Thread pointer = (TcbSize + 0x0 = 0x8)
+// CHECK-NEXT: 11000: 08 00 00 00
+// offset of z from Thread pointer = (TcbSize + 0x8 = 0x10)
+// CHECK-NEXT: 11004: 10 00 00 00
+// offset of y from Thread pointer = (TcbSize + 0x4 = 0xc)
+// CHECK-NEXT: 11008: 0c 00 00 00
Modified: vendor/lld/dist-release_80/test/ELF/arm-tls-norelax-ie-le.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/arm-tls-norelax-ie-le.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/arm-tls-norelax-ie-le.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -37,5 +37,5 @@ x2:
.type x2, %object
// CHECK: Contents of section .got:
-// x1 at offset 0x20 from TP, x2 at offset 0x24 from TP. Offsets include TCB size of 0x20
-// CHECK-NEXT: 13064 20000000 24000000
+// x1 at offset 8 from TP, x2 at offset 0xc from TP. Offsets include TCB size of 8
+// CHECK-NEXT: 13064 08000000 0c000000
Added: vendor/lld/dist-release_80/test/ELF/compressed-input-alignment.test
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor/lld/dist-release_80/test/ELF/compressed-input-alignment.test Tue Jun 11 18:17:23 2019 (r348942)
@@ -0,0 +1,67 @@
+# REQUIRES: zlib, x86
+
+# RUN: yaml2obj -docnum=1 %s -o %t.o
+# RUN: ld.lld %t.o %t.o -o %t2
+# RUN: llvm-readobj -sections -section-data %t2 | FileCheck %s
+
+# RUN: yaml2obj -docnum=2 %s -o %t.o
+# RUN: ld.lld %t.o %t.o -o %t2
+# RUN: llvm-readobj -sections -section-data %t2 | FileCheck %s
+
+# CHECK: Name: .debug_info
+# CHECK-NEXT: Type: SHT_PROGBITS
+# CHECK-NEXT: Flags [
+# CHECK-NEXT: ]
+# CHECK-NEXT: Address: 0x0
+# CHECK-NEXT: Offset: 0xE8
+# CHECK-NEXT: Size: 108
+# CHECK-NEXT: Link: 0
+# CHECK-NEXT: Info: 0
+# CHECK-NEXT: AddressAlignment: 1
+# CHECK-NEXT: EntrySize: 0
+# CHECK-NEXT: SectionData (
+# CHECK-NEXT: 0000: {{.*}} |ABCDEFGHIJKLMNOP|
+# CHECK-NEXT: 0010: {{.*}} |QRSTUVWXYZ.ABCDE|
+# CHECK-NEXT: 0020: {{.*}} |FGHIJKLMNOPQRSTU|
+# CHECK-NEXT: 0030: {{.*}} |VWXYZ.ABCDEFGHIJ|
+# CHECK-NEXT: 0040: {{.*}} |KLMNOPQRSTUVWXYZ|
+# CHECK-NEXT: 0050: {{.*}} |.ABCDEFGHIJKLMNO|
+# CHECK-NEXT: 0060: {{.*}} |PQRSTUVWXYZ.|
+# CHECK-NEXT: )
+# CHECK-NEXT: }
+
+## YAML below is produced from the following code. AddressAlign of .debug_info is 8,
+## while compressed header has ch_addralign = 1. LLD had a bug and did not use the
+## value of ch_addralign at all. We produced broken section content.
+##
+## .section .debug_info,"", at progbits
+## .string "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+## .string "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
+
+--- !ELF
+FileHeader:
+ Class: ELFCLASS64
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_X86_64
+Sections:
+ - Name: .debug_info
+ Type: SHT_PROGBITS
+ Flags: [ SHF_COMPRESSED ]
+ AddressAlign: 0x0000000000000008
+ Content: 010000000000000036000000000000000100000000000000789C73747276717573F7F0F4F2F6F1F5F30F080C0A0E090D0B8F888C6270C42D0500ADA00FBF
+
+## YAML below is the same as above, with a single change: ch_addralign field of the compressed
+## header was set to 0. This is allowed by the standard, we have to support it.
+--- !ELF
+FileHeader:
+ Class: ELFCLASS64
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_X86_64
+Sections:
+ - Name: .debug_info
+ Type: SHT_PROGBITS
+ Flags: [ SHF_COMPRESSED ]
+ AddressAlign: 0x0000000000000008
+ Content: 010000000000000036000000000000000000000000000000789C73747276717573F7F0F4F2F6F1F5F30F080C0A0E090D0B8F888C6270C42D0500ADA00FBF
Modified: vendor/lld/dist-release_80/test/ELF/eh-frame-hdr-augmentation.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/eh-frame-hdr-augmentation.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/eh-frame-hdr-augmentation.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -11,7 +11,7 @@
// CHECK-NEXT: Code alignment factor: 1
// CHECK-NEXT: Data alignment factor: -8
// CHECK-NEXT: Return address column: 16
-// CHECK-NEXT: Personality Address: 00000dad
+// CHECK-NEXT: Personality Address: 0000000000000dad
// CHECK-NEXT: Augmentation data:
// CHECK: DW_CFA_def_cfa: reg7 +8
@@ -20,7 +20,7 @@
// CHECK-NEXT: DW_CFA_nop:
// CHECK: 00000020 00000014 00000024 FDE cie=00000024 pc=00000d98...00000d98
-// CHECK-NEXT: LSDA Address: 00000d8f
+// CHECK-NEXT: LSDA Address: 0000000000000d8f
// CHECK-NEXT: DW_CFA_nop:
// CHECK-NEXT: DW_CFA_nop:
// CHECK-NEXT: DW_CFA_nop:
Added: vendor/lld/dist-release_80/test/ELF/emit-relocs-mergeable2.s
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor/lld/dist-release_80/test/ELF/emit-relocs-mergeable2.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -0,0 +1,14 @@
+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+# RUN: ld.lld --emit-relocs %t.o -o %t.exe
+# RUN: llvm-readelf --relocations %t.exe | FileCheck %s
+
+# CHECK: 0000000000201004 000000010000000b R_X86_64_32S 0000000000200120 .Lfoo + 8
+
+.globl _start
+_start:
+ movq .Lfoo+8, %rax
+.section .rodata.cst16,"aM", at progbits,16
+.Lfoo:
+ .quad 0
+ .quad 0
Modified: vendor/lld/dist-release_80/test/ELF/gc-sections-metadata-startstop.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/gc-sections-metadata-startstop.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/gc-sections-metadata-startstop.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -11,7 +11,7 @@
# CHECK-NOT: yy
# CHECK: SYMBOL TABLE:
-# CHECK: xx 00000000 __start_xx
+# CHECK: xx 00000000 .protected __start_xx
# CHECK: w *UND* 00000000 __start_yy
.weak __start_xx
Modified: vendor/lld/dist-release_80/test/ELF/mips-micro-relocs.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/mips-micro-relocs.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/mips-micro-relocs.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -39,9 +39,9 @@
# EL-NEXT: 20028: 00 00 00 00 nop
# EL-NEXT: 2002c: 00 94 e8 ff b -44
-# SYM: 00037ff0 .got 00000000 .hidden _gp
-# SYM: 00020000 g F .text 00000000 foo
-# SYM: 00020010 .text 00000000 __start
+# SYM: 00037ff0 .got 00000000 .hidden _gp
+# SYM: 00020000 g F .text 00000000 0x80 foo
+# SYM: 00020010 .text 00000000 0x80 __start
.text
.set micromips
Modified: vendor/lld/dist-release_80/test/ELF/mips-micror6-relocs.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/mips-micror6-relocs.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/mips-micror6-relocs.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -26,8 +26,8 @@
# EL-NEXT: 20014: 7f 80 f6 ff beqzc $3, -36
# EL-NEXT: 20018: ff b7 f4 ff balc -24 <foo>
-# SYM: 00020000 g F .text 00000000 foo
-# SYM: 00020010 .text 00000000 __start
+# SYM: 00020000 g F .text 00000000 0x80 foo
+# SYM: 00020010 .text 00000000 0x80 __start
.text
.set micromips
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-bsymbolic-toc-restore.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-bsymbolic-toc-restore.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-bsymbolic-toc-restore.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -53,7 +53,7 @@ caller:
# CHECK-LABEL: caller
# CHECK: bl .+44
# CHECK-NEXT: mr 31, 3
-# CHECK-NEXT: bl .+67108816
+# CHECK-NEXT: bl .+44
# CHECK-NEXT: ld 2, 24(1)
# CHECK-NEXT: add 3, 3, 31
# CHECK-NEXT: addi 1, 1, 32
@@ -63,6 +63,6 @@ caller:
# CHECK-EMPTY:
# CHECK-NEXT: def:
# CHECK-NEXT: addis 2, 12, 2
-# CHECK-NEXT: addi 2, 2, -32636
+# CHECK-NEXT: addi 2, 2, -32616
# CHECK-NEXT: li 3, 55
# CHECK-NEXT: blr
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-call-reach.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-call-reach.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-call-reach.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -3,16 +3,16 @@
# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
# RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
# RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
# RUN: ld.lld --defsym callee=0xE010014 --defsym tail_callee=0xE010024 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck --check-prefix=NEGOFFSET %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=NEGOFFSET %s
# RUN: ld.lld --defsym callee=0x12010018 --defsym tail_callee=0x12010028 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck --check-prefix=THUNK %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=THUNK %s
# RUN: llvm-readelf --sections %t | FileCheck --check-prefix=BRANCHLT %s
# RUN: not ld.lld --defsym callee=0x1001002D --defsym tail_callee=0x1001002F \
# RUN: %t.o -o %t 2>&1 | FileCheck --check-prefix=MISSALIGNED %s
@@ -20,16 +20,16 @@
# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
# RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
# RUN: ld.lld --defsym callee=0x12010010 --defsym tail_callee=0x12010020 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
# RUN: ld.lld --defsym callee=0xE010014 --defsym tail_callee=0xE010024 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck --check-prefix=NEGOFFSET %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=NEGOFFSET %s
# RUN: ld.lld --defsym callee=0x12010018 --defsym tail_callee=0x12010028 \
# RUN: %t.o -o %t
-# RUN: llvm-objdump -d %t | FileCheck --check-prefix=THUNK %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=THUNK %s
# RUN: llvm-readelf --sections %t | FileCheck --check-prefix=BRANCHLT %s
# RUN: not ld.lld --defsym callee=0x1001002D --defsym tail_callee=0x1001002F \
# RUN: %t.o -o %t 2>&1 | FileCheck --check-prefix=MISSALIGNED %s
@@ -58,37 +58,33 @@ test:
# Check that we are branching to the definitions, and not range-extending
# thunks.
# CHECK-LABEL: test
-# CHECK: 10010014: {{.*}} bl .+33554428
-# CHECK: 10010024: {{.*}} b .+33554428
+# CHECK: 10010014: bl .+33554428
+# CHECK: 10010024: b .+33554428
# NEGOFFSET-LABEL: test
-# NEGOFFSET: 10010014: {{.*}} bl .+33554432
-# NEGOFFSET: 10010024: {{.*}} b .+33554432
+# NEGOFFSET: 10010014: bl .-33554432
+# NEGOFFSET: 10010024: b .+33554432
+# THUNK-LABEL: test:
+# THUNK: 10010014: bl .+20
+# THUNK: 10010024: b .+20
+
# .branch_lt[0]
# THUNK-LABEL: __long_branch_callee:
-# THUNK-NEXT: 10010000: {{.*}} addis 12, 2, -1
+# THUNK-NEXT: 10010028: addis 12, 2, -1
# THUNK-NEXT: ld 12, -32768(12)
# THUNK-NEXT: mtctr 12
# THUNK-NEXT: bctr
# .branch_lt[1]
# THUNK-LABEL: __long_branch_tail_callee:
-# THUNK-NEXT: 10010010: {{.*}} addis 12, 2, -1
+# THUNK-NEXT: 10010038: addis 12, 2, -1
# THUNK-NEXT: ld 12, -32760(12)
# THUNK-NEXT: mtctr 12
# THUNK-NEXT: bctr
-# Each call now branches to a thunk, and although it is printed as positive
-# the offset is interpreted as a signed 26 bit value so 67108812 is actually
-# -52.
-# THUNK-LABEL: test:
-# THUNK: 10010034: {{.*}} bl .+67108812
-# THUNK: 10010044: {{.*}} b .+67108812
-
# The offset from the TOC to the .branch_lt section is (-1 << 16) - 32768.
# Name Type Address Off Size
# BRANCHLT: .branch_lt PROGBITS 0000000010020000 020000 000010
# BRANCHLT: .got PROGBITS 0000000010030000 030000 000008
# BRANCHLT-NOT: .plt
-
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-ifunc.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-ifunc.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-ifunc.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -1,87 +1,75 @@
# REQUIRES: ppc
# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
-# RUN: ld.lld -shared %t2.o -o %t2.so
-# RUN: ld.lld %t.o %t2.so -o %t
-# RUN: llvm-objdump -D %t | FileCheck %s
-# RUN: llvm-readelf -dynamic-table %t | FileCheck --check-prefix=DT %s
-# RUN: llvm-readelf -dyn-relocations %t | FileCheck --check-prefix=DYNREL %s
+# RUN: ld.lld %t.o -o %t
+# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
+# RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+# RUN: llvm-readelf -r %t | FileCheck --check-prefix=DYNREL %s
# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
-# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
-# RUN: ld.lld -shared %t2.o -o %t2.so
-# RUN: ld.lld %t.o %t2.so -o %t
-# RUN: llvm-objdump -D %t | FileCheck %s
-# RUN: llvm-readelf -dynamic-table %t | FileCheck --check-prefix=DT %s
-# RUN: llvm-readelf -dyn-relocations %t | FileCheck --check-prefix=DYNREL %s
+# RUN: ld.lld %t.o -o %t
+# RUN: llvm-nm %t | FileCheck --check-prefix=NM %s
+# RUN: llvm-readelf -S %t | FileCheck --check-prefix=SECTIONS %s
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+# RUN: llvm-readelf -r %t | FileCheck --check-prefix=DYNREL %s
-# CHECK: Disassembly of section .text:
+# NM-DAG: 0000000010028000 d .TOC.
+# NM-DAG: 0000000010010000 T ifunc
+# NM-DAG: 0000000010010004 T ifunc2
-# Tocbase + (0 << 16) + 32560
-# 0x100280e0 + 0 + 32560 = 0x10030010 (.plt[2])
-# CHECK: __plt_foo:
+# SECTIONS: .plt NOBITS 0000000010030000
+
+# __plt_ifunc - . = 0x10010020 - 0x10010010 = 16
+# __plt_ifunc2 - . = 0x10010044 - 0x10010018 = 28
+# CHECK: _start:
+# CHECK-NEXT: addis 2, 12, 1
+# CHECK-NEXT: addi 2, 2, 32760
+# CHECK-NEXT: 10010010: bl .+16
+# CHECK-NEXT: ld 2, 24(1)
+# CHECK-NEXT: 10010018: bl .+28
+# CHECK-NEXT: ld 2, 24(1)
+
+# .plt[0] - .TOC. = 0x10030000 - 0x10028000 = (1<<16) - 32768
+# CHECK: __plt_ifunc:
# CHECK-NEXT: std 2, 24(1)
-# CHECK-NEXT: addis 12, 2, 0
-# CHECK-NEXT: ld 12, 32560(12)
+# CHECK-NEXT: addis 12, 2, 1
+# CHECK-NEXT: ld 12, -32768(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
-# Tocbase + (0 << 16) + 32568
-# 0x100280e0 + 0 + 32568 = 0x1003018 (.plt[3])
-# CHECK: __plt_ifunc:
+# .plt[1] - .TOC. = 0x10030000+8 - 0x10028000 = (1<<16) - 32760
+# CHECK: __plt_ifunc2:
# CHECK-NEXT: std 2, 24(1)
-# CHECK-NEXT: addis 12, 2, 0
-# CHECK-NEXT: ld 12, 32568(12)
+# CHECK-NEXT: addis 12, 2, 1
+# CHECK-NEXT: ld 12, -32760(12)
# CHECK-NEXT: mtctr 12
# CHECK-NEXT: bctr
-# CHECK: ifunc:
-# CHECK-NEXT: 10010028: {{.*}} nop
+# Check that we emit 2 R_PPC64_IRELATIVE.
+# DYNREL: R_PPC64_IRELATIVE 10010000
+# DYNREL: R_PPC64_IRELATIVE 10010004
-# CHECK: _start:
-# CHECK-NEXT: addis 2, 12, 2
-# CHECK-NEXT: addi 2, 2, -32588
-# CHECK-NEXT: bl .+67108812
-# CHECK-NEXT: ld 2, 24(1)
-# CHECK-NEXT: bl .+67108824
-# CHECK-NEXT: ld 2, 24(1)
-
-# Check tocbase
-# CHECK: Disassembly of section .got:
-# CHECK-NEXT: .got:
-# CHECK-NEXT: 100200e0
-
-# Check .plt address
-# DT_PLTGOT should point to the start of the .plt section.
-# DT: 0x0000000000000003 PLTGOT 0x10030000
-
-# Check that we emit the correct dynamic relocation type for an ifunc
-# DYNREL: 'PLT' relocation section at offset 0x{{[0-9a-f]+}} contains 48 bytes:
-# 48 bytes --> 2 Elf64_Rela relocations
-# DYNREL-NEXT: Offset Info Type Symbol's Value Symbol's Name + Addend
-# DYNREL-NEXT: {{[0-9a-f]+}} {{[0-9a-f]+}} R_PPC64_JMP_SLOT {{0+}} foo + 0
-# DYNREL-NEXT: {{[0-9a-f]+}} {{[0-9a-f]+}} R_PPC64_IRELATIVE 10010028
-
-
- .text
- .abiversion 2
-
.type ifunc STT_GNU_IFUNC
.globl ifunc
ifunc:
- nop
+ nop
- .global _start
- .type _start, at function
+.type ifunc2 STT_GNU_IFUNC
+.globl ifunc2
+ifunc2:
+ nop
+.global _start
+.type _start, at function
+
_start:
.Lfunc_gep0:
addis 2, 12, .TOC.-.Lfunc_gep0 at ha
addi 2, 2, .TOC.-.Lfunc_gep0 at l
.Lfunc_lep0:
.localentry _start, .Lfunc_lep0-.Lfunc_gep0
- bl foo
- nop
bl ifunc
+ nop
+ bl ifunc2
nop
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-local-dynamic.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-local-dynamic.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-local-dynamic.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -113,7 +113,7 @@ k:
// Dis: test:
// Dis: addis 3, 2, 0
// Dis-NEXT: addi 3, 3, -32760
-// Dis-NEXT: bl .+67108804
+// Dis-NEXT: bl .+60
// Dis-NEXT: ld 2, 24(1)
// Dis-NEXT: addis 3, 3, 0
// Dis-NEXT: lwa 3, -32768(3)
Added: vendor/lld/dist-release_80/test/ELF/ppc64-local-entry.s
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-local-entry.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -0,0 +1,47 @@
+# REQUIRES: ppc
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64 %s -o %t
+# RUN: ld.lld -r %t -o %t2
+# RUN: llvm-objdump -s -section=.symtab %t2 | FileCheck %s
+
+.text
+.abiversion 2
+.globl _start
+.p2align 2
+.type _start, at function
+
+_start:
+.Lfunc_begin0:
+.Lfunc_gep0:
+ addis 2, 12, .TOC.-.Lfunc_gep0 at ha
+ addi 2, 2, .TOC.-.Lfunc_gep0 at l
+.Lfunc_lep0:
+ .localentry _start, .Lfunc_lep0-.Lfunc_gep0
+ # The code below is not important, it just needs to access some
+ # global data or function, in order to use the TOC.
+ # In this case, it performs the following:
+ # g += 10;
+ # Also note that this code is not intended to be run, but only
+ # to check if the linker will preserve the localentry info.
+ addis 3, 2, g at toc@ha
+ addi 3, 3, g at toc@l
+ lwz 4, 0(3)
+ addi 4, 4, 10
+ stw 4, 0(3)
+ blr
+ .long 0
+ .quad 0
+.Lfunc_end0:
+ .size _start, .Lfunc_end0-.Lfunc_begin0
+
+ .type g, at object # @g
+ .lcomm g,4,4
+
+// We expect the st_other byte to be 0x60:
+// localentry = 011 (gep + 2 instructions), reserved = 000,
+// visibility = 00 (STV_DEFAULT)
+// Currently, llvm-objdump does not support displaying
+// st_other's PPC64 specific flags, thus we check the
+// result of the hexdump of .symtab section.
+
+// CHECK: 0070 00000000 00000000 00000009 12600001
Added: vendor/lld/dist-release_80/test/ELF/ppc64-long-branch-init.s
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-long-branch-init.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -0,0 +1,43 @@
+# REQUIRES: ppc
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64-pc-freebsd13.0 %s -o %t.o
+# RUN: ld.lld %t.o -o %t
+# RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
+
+## .init consists of sections from several object files. Sections other than the
+## last one do not have a terminator. Check we do not create a long branch stub
+## in the middle.
+## We currently use thunk section spacing to ensure the stub is in the end. This
+## is not foolproof but good enough to not break in practice.
+
+# CHECK: Disassembly of section .init:
+# CHECK-LABEL: _init:
+# CHECK: blr
+# CHECK-EMPTY:
+# CHECK-LABEL: __long_branch_foo:
+
+.globl foo
+foo:
+ .space 0x2000000
+ blr
+
+.section .init,"ax", at progbits,unique,0
+.globl _init
+_init:
+ stdu 1, -48(1)
+ mflr 0
+ std 0, 64(1)
+
+.section .init,"ax", at progbits,unique,1
+ bl foo
+ nop
+
+.section .init,"ax", at progbits,unique,2
+ bl foo
+ nop
+
+.section .init,"ax", at progbits,unique,3
+ ld 1, 0(1)
+ ld 0, 16(1)
+ mtlr 0
+ blr
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-plt-stub.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-plt-stub.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-plt-stub.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -4,16 +4,19 @@
// RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
// RUN: ld.lld -shared %t2.o -o %t2.so
// RUN: ld.lld %t.o %t2.so -o %t
-// RUN: llvm-objdump -d %t | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
// RUN: ld.lld -shared %t2.o -o %t2.so
// RUN: ld.lld %t.o %t2.so -o %t
-// RUN: llvm-objdump -d %t | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
// CHECK: Disassembly of section .text:
-// CHECK-NEXT: __plt_foo:
+// CHECK-NEXT: _start:
+// CHECK: 10010008: bl .+16
+
+// CHECK-LABEL: 0000000010010018 __plt_foo:
// CHECK-NEXT: std 2, 24(1)
// CHECK-NEXT: addis 12, 2, 0
// CHECK-NEXT: ld 12, 32560(12)
@@ -21,8 +24,6 @@
// CHECK-NEXT: bctr
-// CHECK: _start:
-// CHECK: bl .+67108824
.text
.abiversion 2
.globl _start
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-rel-calls.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-rel-calls.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-rel-calls.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -30,9 +30,8 @@ bar:
nop
blr
-# FIXME: The printing here is misleading, the branch offset here is negative.
-# CHECK: 1001000c: {{.*}} bl .+67108852
+# CHECK: 1001000c: {{.*}} bl .-12
# CHECK: 10010010: {{.*}} nop
-# CHECK: 10010014: {{.*}} bl .+67108844
+# CHECK: 10010014: {{.*}} bl .-20
# CHECK: 10010018: {{.*}} nop
# CHECK: 1001001c: {{.*}} blr
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore-recursive-call.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore-recursive-call.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore-recursive-call.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -1,8 +1,8 @@
# REQUIRES: ppc
-# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t1.o
-# RUN: ld.lld -shared %t1.o -o %t
-# RUN: llvm-objdump -d -r %t | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
+# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: llvm-objdump -d --no-show-raw-insn -r %t.so | FileCheck %s
# For a recursive call that is interposable the linker calls the plt-stub rather
# then calling the function directly. Since the call is through a plt stub and
@@ -14,12 +14,11 @@
# for recursive calls as well as keeps the logic for recursive calls consistent
# with non-recursive calls.
-# CHECK-LABEL: __plt_recursive_func:
-# CHECK-NEXT: 10000:
-# CHECK-LABEL: recursive_func
-# CHECK-NEXT: 10014:
-# CHECK: 1003c: {{[0-9a-fA-F ]+}} bl .+67108804
-# CHECK-NEXT: ld 2, 24(1)
+# CHECK-LABEL: 0000000000010000 recursive_func:
+# CHECK: 10028: bl .+32
+# CHECK-NEXT: ld 2, 24(1)
+
+# CHECK-LABEL: 0000000000010048 __plt_recursive_func:
.abiversion 2
.section ".text"
Modified: vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore.s
==============================================================================
--- vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore.s Tue Jun 11 18:17:19 2019 (r348941)
+++ vendor/lld/dist-release_80/test/ELF/ppc64-toc-restore.s Tue Jun 11 18:17:23 2019 (r348942)
@@ -5,14 +5,14 @@
// RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %p/Inputs/ppc64-func.s -o %t3.o
// RUN: ld.lld -shared %t2.o -o %t2.so
// RUN: ld.lld %t.o %t2.so %t3.o -o %t
-// RUN: llvm-objdump -d %t | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/shared-ppc64.s -o %t2.o
// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %p/Inputs/ppc64-func.s -o %t3.o
// RUN: ld.lld -shared %t2.o -o %t2.so
// RUN: ld.lld %t.o %t2.so %t3.o -o %t
-// RUN: llvm-objdump -d %t | FileCheck %s
+// RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
.text
.abiversion 2
@@ -28,17 +28,12 @@ _start:
bl foo
nop
bl bar_local
+// CHECK-LABEL: _start:
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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