svn commit: r349955 - in stable: 11/sys/amd64/amd64 11/sys/x86/include 12/sys/amd64/amd64 12/sys/x86/include
John Baldwin
jhb at FreeBSD.org
Fri Jul 12 20:05:32 UTC 2019
Author: jhb
Date: Fri Jul 12 20:05:30 2019
New Revision: 349955
URL: https://svnweb.freebsd.org/changeset/base/349955
Log:
MFC 348210: Add a constant for the LS config MSR on AMD CPUs.
Modified:
stable/11/sys/amd64/amd64/initcpu.c
stable/11/sys/x86/include/specialreg.h
Directory Properties:
stable/11/ (props changed)
Changes in other areas also in this revision:
Modified:
stable/12/sys/amd64/amd64/initcpu.c
stable/12/sys/x86/include/specialreg.h
Directory Properties:
stable/12/ (props changed)
Modified: stable/11/sys/amd64/amd64/initcpu.c
==============================================================================
--- stable/11/sys/amd64/amd64/initcpu.c Fri Jul 12 19:43:59 2019 (r349954)
+++ stable/11/sys/amd64/amd64/initcpu.c Fri Jul 12 20:05:30 2019 (r349955)
@@ -122,9 +122,9 @@ init_amd(void)
*/
if (CPUID_TO_FAMILY(cpu_id) == 0x16 && CPUID_TO_MODEL(cpu_id) <= 0xf) {
if ((cpu_feature2 & CPUID2_HV) == 0) {
- msr = rdmsr(0xc0011020);
+ msr = rdmsr(MSR_LS_CFG);
msr |= (uint64_t)1 << 15;
- wrmsr(0xc0011020, msr);
+ wrmsr(MSR_LS_CFG, msr);
}
}
@@ -137,9 +137,9 @@ init_amd(void)
wrmsr(0xc0011029, msr);
/* 1033 */
- msr = rdmsr(0xc0011020);
+ msr = rdmsr(MSR_LS_CFG);
msr |= 0x10;
- wrmsr(0xc0011020, msr);
+ wrmsr(MSR_LS_CFG, msr);
/* 1049 */
msr = rdmsr(0xc0011028);
@@ -147,9 +147,9 @@ init_amd(void)
wrmsr(0xc0011028, msr);
/* 1095 */
- msr = rdmsr(0xc0011020);
+ msr = rdmsr(MSR_LS_CFG);
msr |= 0x200000000000000;
- wrmsr(0xc0011020, msr);
+ wrmsr(MSR_LS_CFG, msr);
}
/*
Modified: stable/11/sys/x86/include/specialreg.h
==============================================================================
--- stable/11/sys/x86/include/specialreg.h Fri Jul 12 19:43:59 2019 (r349954)
+++ stable/11/sys/x86/include/specialreg.h Fri Jul 12 20:05:30 2019 (r349955)
@@ -908,6 +908,7 @@
#define MSR_VM_HSAVE_PA 0xc0010117 /* SVM: host save area address */
#define MSR_AMD_CPUID07 0xc0011002 /* CPUID 07 %ebx override */
#define MSR_EXTFEATURES 0xc0011005 /* Extended CPUID Features override */
+#define MSR_LS_CFG 0xc0011020
#define MSR_IC_CFG 0xc0011021 /* Instruction Cache Configuration */
/* MSR_VM_CR related */
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