svn commit: r344083 - head/sys/powerpc/booke

[Justin Hibbits]

Author: jhibbits
Date: Wed Feb 13 03:11:12 2019
New Revision: 344083
URL: https://svnweb.freebsd.org/changeset/base/344083

Log:
  powerpc/booke: Use the 'tlbilx' instruction on newer cores
  
  Newer cores have the 'tlbilx' instruction, which doesn't broadcast over
  CoreNet.  This is significantly faster than walking the TLB to invalidate
  the PID mappings.  tlbilx with the arguments given takes 131 clock cycles to
  complete, as opposed to 512 iterations through the loop plus tlbre/tlbwe at
  each iteration.
  
  MFC after:	3 weeks

Modified:
  head/sys/powerpc/booke/pmap.c

Modified: head/sys/powerpc/booke/pmap.c
==============================================================================
--- head/sys/powerpc/booke/pmap.c	Wed Feb 13 02:46:46 2019	(r344082)
+++ head/sys/powerpc/booke/pmap.c	Wed Feb 13 03:11:12 2019	(r344083)
@@ -4325,6 +4325,21 @@ tid_flush(tlbtid_t tid)
 	msr = mfmsr();
 	__asm __volatile("wrteei 0");
 
+	/*
+	 * Newer (e500mc and later) have tlbilx, which doesn't broadcast, so use
+	 * it for PID invalidation.
+	 */
+	switch ((mfpvr() >> 16) & 0xffff) {
+	case FSL_E500mc:
+	case FSL_E5500:
+	case FSL_E6500:
+		mtspr(SPR_MAS6, tid << MAS6_SPID0_SHIFT);
+		/* tlbilxpid */
+		__asm __volatile("isync; .long 0x7c000024; isync; msync");
+		mtmsr(msr);
+		return;
+	}
+
 	for (way = 0; way < TLB0_WAYS; way++)
 		for (entry = 0; entry < TLB0_ENTRIES_PER_WAY; entry++) {