svn commit: r350605 - in stable/12/sys: arm/allwinner arm/allwinner/a10 arm/allwinner/clkng arm64/conf conf dts/arm64/overlays modules/dtb/allwinner
Emmanuel Vadot
manu at FreeBSD.org
Mon Aug 5 18:27:28 UTC 2019
Author: manu
Date: Mon Aug 5 18:27:25 2019
New Revision: 350605
URL: https://svnweb.freebsd.org/changeset/base/350605
Log:
MFC r346334, r346787-r346789, r347017
r346334:
arm: allwinner: Fix audio for Allwinner H3/H5
Due to three conditions the codec driver for Allwinner A10/A20 and H3/H5 did not work properly here:
Wrong bit position for the analog audio reset
Hardware Reset of codec was not de-asserted correctly
Linux DTS file did not contain the address of the analog register the way as the driver was expecting it.
This patch proposes fixes for those three parts.
Submitted by: freebsdnewbie at freenet.de (Manuel Stühn)
Differential Revision: https://reviews.freebsd.org/D19910
r346787:
arm64: allwinner: Add compatible strings for clock devices used on both Allwinner H3 and H5
Allwinner H3 and H5 share many internal components, that's why they can
use the same drivers.
This patch adds the compatible strings to enable clock drivers
probing on Allwinner NanoPI NEO2 device.
Tested on: NanoPi NEO2 (by submitter), OrangePi PC2 (by manu)
Submitted by: Manuel Stühn (freebsdnewbie at freenet.de)
Differential Revision: https://reviews.freebsd.org/D20069
r346788:
arm64: allwinner: ccu_de2: Remove H5 compatible
We don't have the display engine driver commited in FreeBSD yet so it is
useless to expose the clocks yet (and also it have not been tested on H5).
Reported by: Manuel Stühn (freebsdnewbie at freenet.de)
PR: 237571
r346789:
arm: allwinner: a10: Correct pin functions
PB20 and PB21 alternate function 1 is i2c2 not i2c1
Reported by: Horiki Mori (yamori813 at yahoo.co.jp)
PR: 237401
r347017:
arm64: Add support for NanoPI NEO2
Add overlay files and activate devicetree file for NanoPi NEO2 featuring
Allwinner H5 ARM64 core.
To enable sound, dma and codec drivers are enabled for build.
Submitted by: Manuel Stühn (freebsdnewbie at freenet.de)
Differential Revision: https://reviews.freebsd.org/D20129
Added:
stable/12/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso
- copied unchanged from r347017, head/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso
stable/12/sys/dts/arm64/overlays/sun50i-h5-opp.dtso
- copied unchanged from r347017, head/sys/dts/arm64/overlays/sun50i-h5-opp.dtso
stable/12/sys/dts/arm64/overlays/sun50i-h5-sid.dtso
- copied unchanged from r347017, head/sys/dts/arm64/overlays/sun50i-h5-sid.dtso
stable/12/sys/dts/arm64/overlays/sun50i-h5-ths.dtso
- copied unchanged from r347017, head/sys/dts/arm64/overlays/sun50i-h5-ths.dtso
Modified:
stable/12/sys/arm/allwinner/a10/a10_padconf.c
stable/12/sys/arm/allwinner/a10_codec.c
stable/12/sys/arm/allwinner/aw_rtc.c
stable/12/sys/arm/allwinner/aw_syscon.c
stable/12/sys/arm/allwinner/clkng/ccu_de2.c
stable/12/sys/arm64/conf/GENERIC
stable/12/sys/conf/files.arm64
stable/12/sys/modules/dtb/allwinner/Makefile
Directory Properties:
stable/12/ (props changed)
Modified: stable/12/sys/arm/allwinner/a10/a10_padconf.c
==============================================================================
--- stable/12/sys/arm/allwinner/a10/a10_padconf.c Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/arm/allwinner/a10/a10_padconf.c Mon Aug 5 18:27:25 2019 (r350605)
@@ -77,8 +77,8 @@ const static struct allwinner_pins a10_pins[] = {
{"PB17", 1, 17, {"gpio_in", "gpio_out", "spi2", "jtag", NULL, NULL, NULL, NULL}},
{"PB18", 1, 18, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
{"PB19", 1, 19, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
- {"PB20", 1, 20, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
- {"PB21", 1, 21, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}},
+ {"PB20", 1, 20, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}},
+ {"PB21", 1, 21, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}},
{"PB22", 1, 22, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
{"PB23", 1, 23, {"gpio_in", "gpio_out", "uart0", "ir1", NULL, NULL, NULL, NULL}},
Modified: stable/12/sys/arm/allwinner/a10_codec.c
==============================================================================
--- stable/12/sys/arm/allwinner/a10_codec.c Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/arm/allwinner/a10_codec.c Mon Aug 5 18:27:25 2019 (r350605)
@@ -164,7 +164,7 @@ struct a10codec_chinfo {
struct a10codec_info {
device_t dev;
- struct resource *res[3];
+ struct resource *res[2];
struct mtx *lock;
bus_dma_tag_t dmat;
unsigned dmasize;
@@ -178,11 +178,12 @@ struct a10codec_info {
static struct resource_spec a10codec_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
- { SYS_RES_MEMORY, 1, RF_ACTIVE | RF_OPTIONAL },
- { SYS_RES_IRQ, 0, RF_ACTIVE },
{ -1, 0 }
};
+#define CODEC_ANALOG_READ(sc, reg) bus_read_4((sc)->res[1], (reg))
+#define CODEC_ANALOG_WRITE(sc, reg, val) bus_write_4((sc)->res[1], (reg), (val))
+
#define CODEC_READ(sc, reg) bus_read_4((sc)->res[0], (reg))
#define CODEC_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
@@ -372,7 +373,7 @@ MIXER_DECLARE(a10_mixer);
*/
#define H3_PR_CFG 0x00
-#define H3_AC_PR_RST (1 << 18)
+#define H3_AC_PR_RST (1 << 28)
#define H3_AC_PR_RW (1 << 24)
#define H3_AC_PR_ADDR_SHIFT 16
#define H3_AC_PR_ADDR_MASK (0x1f << H3_AC_PR_ADDR_SHIFT)
@@ -424,23 +425,23 @@ h3_pr_read(struct a10codec_info *sc, u_int addr)
uint32_t val;
/* Read current value */
- val = bus_read_4(sc->res[1], H3_PR_CFG);
+ val = CODEC_ANALOG_READ(sc, H3_PR_CFG);
/* De-assert reset */
val |= H3_AC_PR_RST;
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
/* Read mode */
val &= ~H3_AC_PR_RW;
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
/* Set address */
val &= ~H3_AC_PR_ADDR_MASK;
val |= (addr << H3_AC_PR_ADDR_SHIFT);
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
/* Read data */
- return (bus_read_4(sc->res[1], H3_PR_CFG) & H3_ACDA_PR_RDAT_MASK);
+ return (CODEC_ANALOG_READ(sc , H3_PR_CFG) & H3_ACDA_PR_RDAT_MASK);
}
static void
@@ -449,25 +450,25 @@ h3_pr_write(struct a10codec_info *sc, u_int addr, u_in
uint32_t val;
/* Read current value */
- val = bus_read_4(sc->res[1], H3_PR_CFG);
+ val = CODEC_ANALOG_READ(sc, H3_PR_CFG);
/* De-assert reset */
val |= H3_AC_PR_RST;
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
/* Set address */
val &= ~H3_AC_PR_ADDR_MASK;
val |= (addr << H3_AC_PR_ADDR_SHIFT);
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
/* Write data */
val &= ~H3_ACDA_PR_WDAT_MASK;
val |= (data << H3_ACDA_PR_WDAT_SHIFT);
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
/* Write mode */
val |= H3_AC_PR_RW;
- bus_write_4(sc->res[1], H3_PR_CFG, val);
+ CODEC_ANALOG_WRITE(sc, H3_PR_CFG, val);
}
static void
@@ -483,8 +484,28 @@ h3_pr_set_clear(struct a10codec_info *sc, u_int addr,
static int
h3_mixer_init(struct snd_mixer *m)
{
+ int rid=1;
+ pcell_t reg[2];
+ phandle_t analogref;
struct a10codec_info *sc = mix_getdevinfo(m);
+ if (OF_getencprop(ofw_bus_get_node(sc->dev), "allwinner,codec-analog-controls",
+ &analogref, sizeof(analogref)) <= 0) {
+ return (ENXIO);
+ }
+
+ if (OF_getencprop(OF_node_from_xref(analogref), "reg",
+ reg, sizeof(reg)) <= 0) {
+ return (ENXIO);
+ }
+
+ sc->res[1] = bus_alloc_resource(sc->dev, SYS_RES_MEMORY, &rid, reg[0],
+ reg[0]+reg[1], reg[1], RF_ACTIVE );
+
+ if (sc->res[1] == NULL) {
+ return (ENXIO);
+ }
+
mix_setdevs(m, SOUND_MASK_PCM | SOUND_MASK_VOLUME | SOUND_MASK_RECLEV |
SOUND_MASK_MIC | SOUND_MASK_LINE | SOUND_MASK_LINE1);
mix_setrecdevs(m, SOUND_MASK_MIC | SOUND_MASK_LINE | SOUND_MASK_LINE1 |
@@ -940,6 +961,7 @@ a10codec_chan_trigger(kobj_t obj, void *data, int go)
switch (go) {
case PCMTRIG_START:
ch->run = 1;
+ a10codec_stop(ch);
a10codec_start(ch);
break;
case PCMTRIG_STOP:
@@ -1124,8 +1146,7 @@ a10codec_attach(device_t dev)
}
/* De-assert hwreset */
- if (hwreset_get_by_ofw_name(dev, 0, "apb", &rst) == 0 ||
- hwreset_get_by_ofw_name(dev, 0, "ahb", &rst) == 0) {
+ if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) == 0) {
error = hwreset_deassert(rst);
if (error != 0) {
device_printf(dev, "cannot de-assert reset\n");
@@ -1137,15 +1158,6 @@ a10codec_attach(device_t dev)
val = CODEC_READ(sc, AC_DAC_DPC(sc));
val |= DAC_DPC_EN_DA;
CODEC_WRITE(sc, AC_DAC_DPC(sc), val);
-
-#ifdef notdef
- error = snd_setup_intr(dev, sc->irq, INTR_MPSAFE, a10codec_intr, sc,
- &sc->ih);
- if (error != 0) {
- device_printf(dev, "could not setup interrupt handler\n");
- goto fail;
- }
-#endif
if (mixer_init(dev, sc->cfg->mixer_class, sc)) {
device_printf(dev, "mixer_init failed\n");
Modified: stable/12/sys/arm/allwinner/aw_rtc.c
==============================================================================
--- stable/12/sys/arm/allwinner/aw_rtc.c Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/arm/allwinner/aw_rtc.c Mon Aug 5 18:27:25 2019 (r350605)
@@ -137,6 +137,7 @@ static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun7i-a20-rtc", (uintptr_t) &a20_conf },
{ "allwinner,sun6i-a31-rtc", (uintptr_t) &a31_conf },
{ "allwinner,sun8i-h3-rtc", (uintptr_t) &h3_conf },
+ { "allwinner,sun50i-h5-rtc", (uintptr_t) &h3_conf },
{ NULL, 0 }
};
Modified: stable/12/sys/arm/allwinner/aw_syscon.c
==============================================================================
--- stable/12/sys/arm/allwinner/aw_syscon.c Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/arm/allwinner/aw_syscon.c Mon Aug 5 18:27:25 2019 (r350605)
@@ -53,6 +53,7 @@ static struct ofw_compat_data compat_data[] = {
{"allwinner,sun8i-a83t-system-controller", 1},
{"allwinner,sun8i-h3-system-controller", 1},
{"allwinner,sun8i-h3-system-control", 1},
+ {"allwinner,sun50i-h5-system-control", 1},
{NULL, 0}
};
Modified: stable/12/sys/arm/allwinner/clkng/ccu_de2.c
==============================================================================
--- stable/12/sys/arm/allwinner/clkng/ccu_de2.c Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/arm/allwinner/clkng/ccu_de2.c Mon Aug 5 18:27:25 2019 (r350605)
@@ -115,7 +115,6 @@ static struct aw_ccung_clk de2_ccu_clks[] = {
static struct ofw_compat_data compat_data[] = {
{"allwinner,sun50i-a64-de2-clk", 1},
- {"allwinner,sun50i-h5-de2-clk", 1},
{NULL, 0}
};
Modified: stable/12/sys/arm64/conf/GENERIC
==============================================================================
--- stable/12/sys/arm64/conf/GENERIC Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/arm64/conf/GENERIC Mon Aug 5 18:27:25 2019 (r350605)
@@ -191,11 +191,19 @@ device muge
device smcphy
device smsc
+# Sound support
+device sound
+device a10_codec
+
+# DMA controller
+device a31_dmac
+
# GPIO / PINCTRL
device aw_gpio # Allwinner GPIO controller
device gpio
device gpioled
device fdt_pinctrl
+device gpioregulator
device mv_gpio # Marvell GPIO controller
device mvebu_pinctrl # Marvell Pinmux Controller
Modified: stable/12/sys/conf/files.arm64
==============================================================================
--- stable/12/sys/conf/files.arm64 Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/conf/files.arm64 Mon Aug 5 18:27:25 2019 (r350605)
@@ -27,6 +27,10 @@ cloudabi64_vdso_blob.o optional compat_cloudabi64 \
# Allwinner common files
arm/allwinner/a10_ehci.c optional ehci aw_ehci fdt
arm/allwinner/a10_timer.c optional a10_timer fdt
+arm/allwinner/a10_codec.c optional sound a10_codec
+arm/allwinner/a31_dmac.c optional a31_dmac
+arm/allwinner/sunxi_dma_if.m optional a31_dmac
+arm/allwinner/aw_cir.c optional evdev aw_cir fdt
arm/allwinner/aw_gpio.c optional gpio aw_gpio fdt
arm/allwinner/aw_mmc.c optional mmc aw_mmc fdt | mmccam aw_mmc fdt
arm/allwinner/aw_nmi.c optional aw_nmi fdt \
Copied: stable/12/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso (from r347017, head/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ stable/12/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso Mon Aug 5 18:27:25 2019 (r350605, copy of r347017, head/sys/dts/arm64/overlays/sun50i-h5-nanopi-neo2-opp.dtso)
@@ -0,0 +1,32 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/} {
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+};
+
+&{/cpus/cpu at 0} {
+ cpu-supply = <&vdd_cpux>;
+};
+
Copied: stable/12/sys/dts/arm64/overlays/sun50i-h5-opp.dtso (from r347017, head/sys/dts/arm64/overlays/sun50i-h5-opp.dtso)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ stable/12/sys/dts/arm64/overlays/sun50i-h5-opp.dtso Mon Aug 5 18:27:25 2019 (r350605, copy of r347017, head/sys/dts/arm64/overlays/sun50i-h5-opp.dtso)
@@ -0,0 +1,99 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/sun8i-h3-ccu.h>
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/} {
+ cpu_opp_table: opp_table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp at 408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 648000000 {
+ opp-hz = /bits/ 64 <648000000>;
+ opp-microvolt = <1040000 1040000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1080000 1080000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1120000 1120000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1160000 1160000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1200000 1200000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1240000 1240000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1260000 1260000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp at 1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+
+ reg_cpu_fallback: reg_cpu_fallback {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-cpux-dummy";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ };
+
+};
+
+&{/cpus/cpu at 0} {
+ clocks = <&ccu CLK_CPUX>;
+ clock-names = "cpu";
+ clock-latency = <244144>; /* 8 32k periods */
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <®_cpu_fallback>;
+ #cooling-cells = <2>;
+};
+
+&{/cpus/cpu at 1} {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&{/cpus/cpu at 2} {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&{/cpus/cpu at 3} {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
Copied: stable/12/sys/dts/arm64/overlays/sun50i-h5-sid.dtso (from r347017, head/sys/dts/arm64/overlays/sun50i-h5-sid.dtso)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ stable/12/sys/dts/arm64/overlays/sun50i-h5-sid.dtso Mon Aug 5 18:27:25 2019 (r350605, copy of r347017, head/sys/dts/arm64/overlays/sun50i-h5-sid.dtso)
@@ -0,0 +1,17 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/soc} {
+ sid: eeprom at 1c14000 {
+ compatible = "allwinner,sun50i-h5-sid";
+ reg = <0x1c14000 0x400>;
+
+ ths_calib: calib at 234 {
+ reg = <0x234 0x4>;
+ };
+ };
+};
Copied: stable/12/sys/dts/arm64/overlays/sun50i-h5-ths.dtso (from r347017, head/sys/dts/arm64/overlays/sun50i-h5-ths.dtso)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ stable/12/sys/dts/arm64/overlays/sun50i-h5-ths.dtso Mon Aug 5 18:27:25 2019 (r350605, copy of r347017, head/sys/dts/arm64/overlays/sun50i-h5-ths.dtso)
@@ -0,0 +1,26 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-h3-ccu.h>
+#include <dt-bindings/reset/sun8i-h3-ccu.h>
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+};
+
+&{/soc} {
+ ths: thermal_sensor at 1c25000 {
+ compatible = "allwinner,sun50i-h5-ths";
+ reg = <0x01c25000 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+ clock-names = "apb", "ths";
+ resets = <&ccu RST_BUS_THS>;
+ reset-names = "apb";
+ #thermal-sensor-cells = <1>;
+
+ nvmem-cells = <&ths_calib>;
+ nvmem-cell-names = "ths-calib";
+ };
+};
Modified: stable/12/sys/modules/dtb/allwinner/Makefile
==============================================================================
--- stable/12/sys/modules/dtb/allwinner/Makefile Mon Aug 5 18:17:03 2019 (r350604)
+++ stable/12/sys/modules/dtb/allwinner/Makefile Mon Aug 5 18:27:25 2019 (r350605)
@@ -44,14 +44,19 @@ DTS= \
allwinner/sun50i-a64-pine64-plus.dts \
allwinner/sun50i-a64-pine64.dts \
allwinner/sun50i-a64-sopine-baseboard.dts \
- allwinner/sun50i-h5-orangepi-pc2.dts
+ allwinner/sun50i-h5-orangepi-pc2.dts \
+ allwinner/sun50i-h5-nanopi-neo2.dts
DTSO= sun50i-a64-opp.dtso \
sun50i-a64-pwm.dtso \
sun50i-a64-rpwm.dtso \
sun50i-a64-sid.dtso \
sun50i-a64-ths.dtso \
- sun50i-a64-timer.dtso
+ sun50i-a64-timer.dtso \
+ sun50i-h5-opp.dtso \
+ sun50i-h5-sid.dtso \
+ sun50i-h5-ths.dtso \
+ sun50i-h5-nanopi-neo2-opp.dtso
.endif
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