svn commit: r339287 - stable/11/usr.sbin/cpucontrol

Ed Maste emaste at FreeBSD.org
Wed Oct 10 15:54:02 UTC 2018


Author: emaste
Date: Wed Oct 10 15:54:01 2018
New Revision: 339287
URL: https://svnweb.freebsd.org/changeset/base/339287

Log:
  MFC r333569: cpucontrol: improve Intel microcode revision check
  
  According to the Intel SDM (Volme 3, 9.11.7) the BIOS signature MSR
  should be zeroed before executing cpuid (although in practice it does
  not seem to matter).
  
  PR:		192487
  Submitted by:	Dan Lukes
  Reported by:	Henrique de Moraes Holschuh

Modified:
  stable/11/usr.sbin/cpucontrol/intel.c
Directory Properties:
  stable/11/   (props changed)

Modified: stable/11/usr.sbin/cpucontrol/intel.c
==============================================================================
--- stable/11/usr.sbin/cpucontrol/intel.c	Wed Oct 10 15:44:14 2018	(r339286)
+++ stable/11/usr.sbin/cpucontrol/intel.c	Wed Oct 10 15:54:01 2018	(r339287)
@@ -95,7 +95,8 @@ intel_update(const char *dev, const char *path)
 	void *fw_data;
 	size_t data_size, total_size;
 	cpuctl_msr_args_t msrargs = {
-		.msr = MSR_IA32_PLATFORM_ID,
+		.msr = MSR_BIOS_SIGN,
+		.data = 0,
 	};
 	cpuctl_cpuid_args_t idargs = {
 		.level  = 1,	/* Signature. */
@@ -115,12 +116,18 @@ intel_update(const char *dev, const char *path)
 		WARN(0, "could not open %s for writing", dev);
 		return;
 	}
+	error = ioctl(devfd, CPUCTL_WRMSR, &msrargs);
+	if (error < 0) {
+		WARN(0, "ioctl(%s)", dev);
+		goto fail;
+	}
 	error = ioctl(devfd, CPUCTL_CPUID, &idargs);
 	if (error < 0) {
 		WARN(0, "ioctl(%s)", dev);
 		goto fail;
 	}
 	signature = idargs.data[0];
+	msrargs.msr = MSR_IA32_PLATFORM_ID;
 	error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
 	if (error < 0) {
 		WARN(0, "ioctl(%s)", dev);


More information about the svn-src-all mailing list