svn commit: r341303 - head/sys/dev/sfxge/common
Andrew Rybchenko
arybchik at FreeBSD.org
Fri Nov 30 07:06:49 UTC 2018
Author: arybchik
Date: Fri Nov 30 07:06:46 2018
New Revision: 341303
URL: https://svnweb.freebsd.org/changeset/base/341303
Log:
sfxge(4): add support to get active FEC type
Submitted by: Vijay Srivastava <vijays at solarflare.com>
Sponsored by: Solarflare Communications, Inc.
Differential Revision: https://reviews.freebsd.org/D18265
Modified:
head/sys/dev/sfxge/common/ef10_impl.h
head/sys/dev/sfxge/common/ef10_phy.c
head/sys/dev/sfxge/common/efx.h
head/sys/dev/sfxge/common/efx_impl.h
head/sys/dev/sfxge/common/efx_phy.c
Modified: head/sys/dev/sfxge/common/ef10_impl.h
==============================================================================
--- head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:06:35 2018 (r341302)
+++ head/sys/dev/sfxge/common/ef10_impl.h Fri Nov 30 07:06:46 2018 (r341303)
@@ -622,6 +622,7 @@ typedef struct ef10_link_state_s {
uint32_t els_adv_cap_mask;
uint32_t els_lp_cap_mask;
unsigned int els_fcntl;
+ efx_phy_fec_type_t els_fec;
efx_link_mode_t els_link_mode;
#if EFSYS_OPT_LOOPBACK
efx_loopback_type_t els_loopback;
@@ -657,6 +658,11 @@ extern __checkReturn efx_rc_t
ef10_phy_oui_get(
__in efx_nic_t *enp,
__out uint32_t *ouip);
+
+extern __checkReturn efx_rc_t
+ef10_phy_fec_type_get(
+ __in efx_nic_t *enp,
+ __out efx_phy_fec_type_t *fecp);
#if EFSYS_OPT_PHY_STATS
Modified: head/sys/dev/sfxge/common/ef10_phy.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_phy.c Fri Nov 30 07:06:35 2018 (r341302)
+++ head/sys/dev/sfxge/common/ef10_phy.c Fri Nov 30 07:06:46 2018 (r341303)
@@ -125,8 +125,10 @@ mcdi_phy_decode_link_mode(
__in uint32_t link_flags,
__in unsigned int speed,
__in unsigned int fcntl,
+ __in uint32_t fec,
__out efx_link_mode_t *link_modep,
- __out unsigned int *fcntlp)
+ __out unsigned int *fcntlp,
+ __out efx_phy_fec_type_t *fecp)
{
boolean_t fd = !!(link_flags &
(1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
@@ -168,6 +170,22 @@ mcdi_phy_decode_link_mode(
EFSYS_PROBE1(mc_pcol_error, int, fcntl);
*fcntlp = 0;
}
+
+ switch (fec) {
+ case MC_CMD_FEC_NONE:
+ *fecp = EFX_PHY_FEC_NONE;
+ break;
+ case MC_CMD_FEC_BASER:
+ *fecp = EFX_PHY_FEC_BASER;
+ break;
+ case MC_CMD_FEC_RS:
+ *fecp = EFX_PHY_FEC_RS;
+ break;
+ default:
+ EFSYS_PROBE1(mc_pcol_error, int, fec);
+ *fecp = EFX_PHY_FEC_NONE;
+ break;
+ }
}
@@ -181,6 +199,7 @@ ef10_phy_link_ev(
unsigned int link_flags;
unsigned int speed;
unsigned int fcntl;
+ efx_phy_fec_type_t fec = MC_CMD_FEC_NONE;
efx_link_mode_t link_mode;
uint32_t lp_cap_mask;
@@ -218,7 +237,8 @@ ef10_phy_link_ev(
link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
mcdi_phy_decode_link_mode(enp, link_flags, speed,
MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
- &link_mode, &fcntl);
+ MC_CMD_FEC_NONE, &link_mode,
+ &fcntl, &fec);
mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
&lp_cap_mask);
@@ -269,15 +289,16 @@ ef10_phy_get_link(
__out ef10_link_state_t *elsp)
{
efx_mcdi_req_t req;
+ uint32_t fec;
EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN,
- MC_CMD_GET_LINK_OUT_LEN);
+ MC_CMD_GET_LINK_OUT_V2_LEN);
efx_rc_t rc;
req.emr_cmd = MC_CMD_GET_LINK;
req.emr_in_buf = payload;
req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
req.emr_out_buf = payload;
- req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN;
+ req.emr_out_length = MC_CMD_GET_LINK_OUT_V2_LEN;
efx_mcdi_execute(enp, &req);
@@ -296,10 +317,16 @@ ef10_phy_get_link(
mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
&elsp->els_lp_cap_mask);
+ if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_V2_LEN)
+ fec = MC_CMD_FEC_NONE;
+ else
+ fec = MCDI_OUT_DWORD(req, GET_LINK_OUT_V2_FEC_TYPE);
+
mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
- &elsp->els_link_mode, &elsp->els_fcntl);
+ fec, &elsp->els_link_mode,
+ &elsp->els_fcntl, &elsp->els_fec);
#if EFSYS_OPT_LOOPBACK
/*
@@ -541,6 +568,29 @@ ef10_phy_oui_get(
return (ENOTSUP);
}
+
+ __checkReturn efx_rc_t
+ef10_phy_fec_type_get(
+ __in efx_nic_t *enp,
+ __out efx_phy_fec_type_t *fecp)
+{
+ efx_rc_t rc;
+ ef10_link_state_t els;
+
+ /* Obtain the active FEC type */
+ if ((rc = ef10_phy_get_link(enp, &els)) != 0)
+ goto fail1;
+
+ *fecp = els.els_fec;
+
+ return (0);
+
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
+}
+
#if EFSYS_OPT_PHY_STATS
Modified: head/sys/dev/sfxge/common/efx.h
==============================================================================
--- head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:06:35 2018 (r341302)
+++ head/sys/dev/sfxge/common/efx.h Fri Nov 30 07:06:46 2018 (r341303)
@@ -3231,6 +3231,17 @@ efx_nic_set_fw_subvariant(
#endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */
+typedef enum efx_phy_fec_type_e {
+ EFX_PHY_FEC_NONE = 0,
+ EFX_PHY_FEC_BASER,
+ EFX_PHY_FEC_RS
+} efx_phy_fec_type_t;
+
+extern __checkReturn efx_rc_t
+efx_phy_fec_type_get(
+ __in efx_nic_t *enp,
+ __out efx_phy_fec_type_t *typep);
+
#ifdef __cplusplus
}
#endif
Modified: head/sys/dev/sfxge/common/efx_impl.h
==============================================================================
--- head/sys/dev/sfxge/common/efx_impl.h Fri Nov 30 07:06:35 2018 (r341302)
+++ head/sys/dev/sfxge/common/efx_impl.h Fri Nov 30 07:06:46 2018 (r341303)
@@ -252,6 +252,7 @@ typedef struct efx_phy_ops_s {
efx_rc_t (*epo_reconfigure)(efx_nic_t *);
efx_rc_t (*epo_verify)(efx_nic_t *);
efx_rc_t (*epo_oui_get)(efx_nic_t *, uint32_t *);
+ efx_rc_t (*epo_fec_type_get)(efx_nic_t *, efx_phy_fec_type_t *);
#if EFSYS_OPT_PHY_STATS
efx_rc_t (*epo_stats_update)(efx_nic_t *, efsys_mem_t *,
uint32_t *);
Modified: head/sys/dev/sfxge/common/efx_phy.c
==============================================================================
--- head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:06:35 2018 (r341302)
+++ head/sys/dev/sfxge/common/efx_phy.c Fri Nov 30 07:06:46 2018 (r341303)
@@ -44,6 +44,7 @@ static const efx_phy_ops_t __efx_phy_siena_ops = {
siena_phy_reconfigure, /* epo_reconfigure */
siena_phy_verify, /* epo_verify */
siena_phy_oui_get, /* epo_oui_get */
+ NULL, /* epo_fec_type_get */
#if EFSYS_OPT_PHY_STATS
siena_phy_stats_update, /* epo_stats_update */
#endif /* EFSYS_OPT_PHY_STATS */
@@ -63,6 +64,7 @@ static const efx_phy_ops_t __efx_phy_ef10_ops = {
ef10_phy_reconfigure, /* epo_reconfigure */
ef10_phy_verify, /* epo_verify */
ef10_phy_oui_get, /* epo_oui_get */
+ ef10_phy_fec_type_get, /* epo_fec_type_get */
#if EFSYS_OPT_PHY_STATS
ef10_phy_stats_update, /* epo_stats_update */
#endif /* EFSYS_OPT_PHY_STATS */
@@ -219,6 +221,11 @@ efx_phy_adv_cap_get(
}
}
+#define EFX_PHY_CAP_FEC_REQ_MASK \
+ (1U << EFX_PHY_CAP_BASER_FEC_REQUESTED) | \
+ (1U << EFX_PHY_CAP_RS_FEC_REQUESTED) | \
+ (1U << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED)
+
__checkReturn efx_rc_t
efx_phy_adv_cap_set(
__in efx_nic_t *enp,
@@ -232,7 +239,8 @@ efx_phy_adv_cap_set(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
- if ((mask & ~epp->ep_phy_cap_mask) != 0) {
+ /* Ignore don't care bits of FEC (FEC EFX_PHY_CAP_*_REQUESTED) */
+ if ((mask & ~(epp->ep_phy_cap_mask | EFX_PHY_CAP_FEC_REQ_MASK)) != 0) {
rc = ENOTSUP;
goto fail1;
}
@@ -331,6 +339,35 @@ efx_phy_module_get_info(
if ((rc = efx_mcdi_phy_module_get_info(enp, dev_addr,
offset, len, data)) != 0)
+ goto fail2;
+
+ return (0);
+
+fail2:
+ EFSYS_PROBE(fail2);
+fail1:
+ EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+ return (rc);
+}
+
+ __checkReturn efx_rc_t
+efx_phy_fec_type_get(
+ __in efx_nic_t *enp,
+ __out efx_phy_fec_type_t *typep)
+{
+ efx_port_t *epp = &(enp->en_port);
+ const efx_phy_ops_t *epop = epp->ep_epop;
+ efx_rc_t rc;
+
+ EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+
+ if (epop->epo_fec_type_get == NULL) {
+ rc = ENOTSUP;
+ goto fail1;
+ }
+
+ if ((rc = epop->epo_fec_type_get(enp, typep)) != 0)
goto fail2;
return (0);
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