svn commit: r340813 - head/sys/dev/sfxge/common

[Andrew Rybchenko]

Author: arybchik
Date: Fri Nov 23 10:19:46 2018
New Revision: 340813
URL: https://svnweb.freebsd.org/changeset/base/340813

Log:
  sfxge(4): copy new header from firmware src
  
  Submitted by:   Andrew Jackson <ajackson at solarflare.com>
  Sponsored by:   Solarflare Communications, Inc.
  Differential Revision:  https://reviews.freebsd.org/D18083

Modified:
  head/sys/dev/sfxge/common/siena_flash.h

Modified: head/sys/dev/sfxge/common/siena_flash.h
==============================================================================
--- head/sys/dev/sfxge/common/siena_flash.h	Fri Nov 23 09:16:07 2018	(r340812)
+++ head/sys/dev/sfxge/common/siena_flash.h	Fri Nov 23 10:19:46 2018	(r340813)
@@ -117,15 +117,21 @@ typedef struct siena_mc_boot_hdr_s {		/* GENERATED BY 
 	efx_word_t	checksum;		/* of whole header area + firmware image */
 	efx_word_t	firmware_version_d;
 	efx_byte_t	mcfw_subtype;
-	efx_byte_t	generation;		/* Valid for medford, SBZ for earlier chips */
+	efx_byte_t	generation;		/* MC (Medford and later): MC partition generation when */
+						/* written to NVRAM. */
+						/* MUM & SUC images: subtype. */
+						/* (Otherwise set to 0) */
 	efx_dword_t	firmware_text_offset;	/* offset to firmware .text */
 	efx_dword_t	firmware_text_size;	/* length of firmware .text, in bytes */
 	efx_dword_t	firmware_data_offset;	/* offset to firmware .data */
 	efx_dword_t	firmware_data_size;	/* length of firmware .data, in bytes */
 	efx_byte_t	spi_rate;		/* SPI rate for reading image, 0 is BootROM default */
 	efx_byte_t	spi_phase_adj;		/* SPI SDO/SCL phase adjustment, 0 is default (no adj) */
-	efx_word_t	xpm_sector;		/* The sector that contains the key, or 0xffff if unsigned (medford) SBZ (earlier) */
-	efx_dword_t	reserved_c[7];		/* (set to 0) */
+	efx_word_t	xpm_sector;		/* XPM (MEDFORD and later): The sector that contains */
+						/* the key, or 0xffff if unsigned. (Otherwise set to 0) */
+	efx_byte_t	mumfw_subtype;		/* MUM & SUC images: subtype. (Otherwise set to 0) */
+	efx_byte_t	reserved_b[3];		/* (set to 0) */
+	efx_dword_t	reserved_c[6];		/* (set to 0) */
 } siena_mc_boot_hdr_t;
 
 #define	SIENA_MC_BOOT_HDR_PADDING \