svn commit: r333405 - head/sys/amd64/amd64
Konstantin Belousov
kib at FreeBSD.org
Wed May 9 12:09:10 UTC 2018
Author: kib
Date: Wed May 9 12:09:08 2018
New Revision: 333405
URL: https://svnweb.freebsd.org/changeset/base/333405
Log:
Remove PG_U from the rest of the kernel pmap ptes.
Supposedly, they PG_U bits there were set to easier making some kernel
page accessible to userspace in-place. Since it was not used for the
whole existence of the amd64 pmap.c and current design of the shared
pages prefers double-mapping over the in-place access, remove PG_U
both from the direct map and KVA slots.
Reviewed by: alc, markj
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Modified:
head/sys/amd64/amd64/pmap.c
Modified: head/sys/amd64/amd64/pmap.c
==============================================================================
--- head/sys/amd64/amd64/pmap.c Wed May 9 12:03:40 2018 (r333404)
+++ head/sys/amd64/amd64/pmap.c Wed May 9 12:09:08 2018 (r333405)
@@ -1011,8 +1011,7 @@ create_pagetables(vm_paddr_t *firstaddr)
/* And connect up the PD to the PDP (leaving room for L4 pages) */
pdp_p = (pdp_entry_t *)(KPDPphys + ptoa(KPML4I - KPML4BASE));
for (i = 0; i < nkpdpe; i++)
- pdp_p[i + KPDPI] = (KPDphys + ptoa(i)) | X86_PG_RW | X86_PG_V |
- PG_U;
+ pdp_p[i + KPDPI] = (KPDphys + ptoa(i)) | X86_PG_RW | X86_PG_V;
/*
* Now, set up the direct map region using 2MB and/or 1GB pages. If
@@ -1038,7 +1037,7 @@ create_pagetables(vm_paddr_t *firstaddr)
}
for (j = 0; i < ndmpdp; i++, j++) {
pdp_p[i] = DMPDphys + ptoa(j);
- pdp_p[i] |= X86_PG_RW | X86_PG_V | PG_U;
+ pdp_p[i] |= X86_PG_RW | X86_PG_V;
}
/*
@@ -1054,7 +1053,7 @@ create_pagetables(vm_paddr_t *firstaddr)
bootaddr_rwx(i << PDRSHIFT);
for (i = 0; i < nkdmpde; i++)
pdp_p[i] = (DMPDkernphys + ptoa(i)) | X86_PG_RW |
- X86_PG_V | PG_U;
+ X86_PG_V;
}
/* And recursively map PML4 to itself in order to get PTmap */
@@ -1065,13 +1064,13 @@ create_pagetables(vm_paddr_t *firstaddr)
/* Connect the Direct Map slot(s) up to the PML4. */
for (i = 0; i < ndmpdpphys; i++) {
p4_p[DMPML4I + i] = DMPDPphys + ptoa(i);
- p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V | PG_U;
+ p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V;
}
/* Connect the KVA slots up to the PML4 */
for (i = 0; i < NKPML4E; i++) {
p4_p[KPML4BASE + i] = KPDPphys + ptoa(i);
- p4_p[KPML4BASE + i] |= X86_PG_RW | X86_PG_V | PG_U;
+ p4_p[KPML4BASE + i] |= X86_PG_RW | X86_PG_V;
}
}
@@ -2628,11 +2627,11 @@ pmap_pinit_pml4(vm_page_t pml4pg)
/* Wire in kernel global address entries. */
for (i = 0; i < NKPML4E; i++) {
pm_pml4[KPML4BASE + i] = (KPDPphys + ptoa(i)) | X86_PG_RW |
- X86_PG_V | PG_U;
+ X86_PG_V;
}
for (i = 0; i < ndmpdpphys; i++) {
pm_pml4[DMPML4I + i] = (DMPDPphys + ptoa(i)) | X86_PG_RW |
- X86_PG_V | PG_U;
+ X86_PG_V;
}
/* install self-referential address mapping entry(s) */
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