svn commit: r335165 - in head/sys/arm/allwinner: a10 a20 clkng
Kyle Evans
kevans at FreeBSD.org
Thu Jun 14 17:50:31 UTC 2018
Author: kevans
Date: Thu Jun 14 17:50:29 2018
New Revision: 335165
URL: https://svnweb.freebsd.org/changeset/base/335165
Log:
aw_ccung: Add a10/a20 support
Note: At this time, this has only been tested on a single board from one of
the supported SoCs. This is enough to boot the board from MMC and have
functional USB- which is still an improvement over where we were at just
before with no functional clocks.
Differential Revision: https://reviews.freebsd.org/D15810
Added:
head/sys/arm/allwinner/clkng/ccu_a10.c (contents, props changed)
head/sys/arm/allwinner/clkng/ccu_a10.h (contents, props changed)
Modified:
head/sys/arm/allwinner/a10/files.a10
head/sys/arm/allwinner/a20/files.a20
head/sys/arm/allwinner/clkng/aw_ccung.c
head/sys/arm/allwinner/clkng/aw_ccung.h
Modified: head/sys/arm/allwinner/a10/files.a10
==============================================================================
--- head/sys/arm/allwinner/a10/files.a10 Thu Jun 14 17:42:36 2018 (r335164)
+++ head/sys/arm/allwinner/a10/files.a10 Thu Jun 14 17:50:29 2018 (r335165)
@@ -2,3 +2,4 @@
arm/allwinner/a10/a10_intc.c standard
arm/allwinner/a10/a10_padconf.c standard
+arm/allwinner/clkng/ccu_a10.c standard
Modified: head/sys/arm/allwinner/a20/files.a20
==============================================================================
--- head/sys/arm/allwinner/a20/files.a20 Thu Jun 14 17:42:36 2018 (r335164)
+++ head/sys/arm/allwinner/a20/files.a20 Thu Jun 14 17:50:29 2018 (r335165)
@@ -1,3 +1,4 @@
# $FreeBSD$
arm/allwinner/a20/a20_padconf.c standard
+arm/allwinner/clkng/ccu_a10.c standard
Modified: head/sys/arm/allwinner/clkng/aw_ccung.c
==============================================================================
--- head/sys/arm/allwinner/clkng/aw_ccung.c Thu Jun 14 17:42:36 2018 (r335164)
+++ head/sys/arm/allwinner/clkng/aw_ccung.c Thu Jun 14 17:50:29 2018 (r335165)
@@ -58,6 +58,10 @@ __FBSDID("$FreeBSD$");
#include "opt_soc.h"
#endif
+#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20)
+#include <arm/allwinner/clkng/ccu_a10.h>
+#endif
+
#if defined(SOC_ALLWINNER_A13)
#include <arm/allwinner/clkng/ccu_a13.h>
#endif
@@ -90,9 +94,15 @@ static struct resource_spec aw_ccung_spec[] = {
};
static struct ofw_compat_data compat_data[] = {
+#if defined(SOC_ALLWINNER_A10)
+ { "allwinner,sun4i-a10-ccu", A10_CCU },
+#endif
#if defined(SOC_ALLWINNER_A31)
{ "allwinner,sun5i-a13-ccu", A13_CCU},
#endif
+#if defined(SOC_ALLWINNER_A20)
+ { "allwinner,sun7i-a20-ccu", A20_CCU },
+#endif
#if defined(SOC_ALLWINNER_H3) || defined(SOC_ALLWINNER_H5)
{ "allwinner,sun8i-h3-ccu", H3_CCU },
{ "allwinner,sun50i-h5-ccu", H3_CCU },
@@ -325,9 +335,19 @@ aw_ccung_attach(device_t dev)
panic("Cannot create clkdom\n");
switch (sc->type) {
+#if defined(SOC_ALLWINNER_A10)
+ case A10_CCU:
+ ccu_a10_register_clocks(sc);
+ break;
+#endif
#if defined(SOC_ALLWINNER_A13)
case A13_CCU:
ccu_a13_register_clocks(sc);
+ break;
+#endif
+#if defined(SOC_ALLWINNER_A20)
+ case A20_CCU:
+ ccu_a20_register_clocks(sc);
break;
#endif
#if defined(SOC_ALLWINNER_H3) || defined(SOC_ALLWINNER_H5)
Modified: head/sys/arm/allwinner/clkng/aw_ccung.h
==============================================================================
--- head/sys/arm/allwinner/clkng/aw_ccung.h Thu Jun 14 17:42:36 2018 (r335164)
+++ head/sys/arm/allwinner/clkng/aw_ccung.h Thu Jun 14 17:50:29 2018 (r335165)
@@ -38,6 +38,8 @@ enum aw_ccung_type {
A13_CCU,
A83T_CCU,
A83T_R_CCU,
+ A10_CCU,
+ A20_CCU,
};
struct aw_ccung_softc {
Added: head/sys/arm/allwinner/clkng/ccu_a10.c
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/allwinner/clkng/ccu_a10.c Thu Jun 14 17:50:29 2018 (r335165)
@@ -0,0 +1,612 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Kyle Evans <kevans at FreeBSD.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+
+#include <dev/extres/clk/clk_div.h>
+#include <dev/extres/clk/clk_fixed.h>
+#include <dev/extres/clk/clk_mux.h>
+
+#include <arm/allwinner/clkng/aw_ccung.h>
+#include <arm/allwinner/clkng/aw_clk.h>
+#include <arm/allwinner/clkng/aw_clk_nm.h>
+#include <arm/allwinner/clkng/aw_clk_nkmp.h>
+#include <arm/allwinner/clkng/aw_clk_prediv_mux.h>
+
+#include <gnu/dts/include/dt-bindings/clock/sun4i-a10-ccu.h>
+#include <gnu/dts/include/dt-bindings/clock/sun7i-a20-ccu.h>
+#include <gnu/dts/include/dt-bindings/reset/sun4i-a10-ccu.h>
+
+#include "ccu_a10.h"
+
+/* Non-exported resets */
+/* Non-exported clocks */
+#define CLK_PLL_CORE 2
+#define CLK_AXI 3
+#define CLK_AHB 4
+#define CLK_APB0 5
+#define CLK_APB1 6
+#define CLK_PLL_VIDEO0 8
+#define CLK_PLL_DDR 12
+#define CLK_PLL_DDR_OTHER 13
+#define CLK_PLL6 14
+#define CLK_PLL_PERIPH 15
+#define CLK_PLL_SATA 16
+#define CLK_PLL_VIDEO1 17
+
+/* Non-exported fixed clocks */
+
+static struct aw_ccung_reset a10_ccu_resets[] = {
+ CCU_RESET(RST_USB_PHY0, 0xcc, 0)
+ CCU_RESET(RST_USB_PHY1, 0xcc, 1)
+ CCU_RESET(RST_USB_PHY2, 0xcc, 2)
+
+ CCU_RESET(RST_GPS, 0xd0, 0)
+
+ CCU_RESET(RST_DE_BE0, 0x104, 30)
+ CCU_RESET(RST_DE_BE1, 0x108, 30)
+ CCU_RESET(RST_DE_FE0, 0x10c, 30)
+ CCU_RESET(RST_DE_FE1, 0x110, 30)
+ CCU_RESET(RST_DE_MP, 0x114, 30)
+
+ CCU_RESET(RST_TVE0, 0x118, 29)
+ CCU_RESET(RST_TCON0, 0x118, 30)
+
+ CCU_RESET(RST_TVE1, 0x11c, 29)
+ CCU_RESET(RST_TCON1, 0x11c, 30)
+
+ CCU_RESET(RST_CSI0, 0x134, 30)
+ CCU_RESET(RST_CSI1, 0x138, 30)
+
+ CCU_RESET(RST_VE, 0x13c, 0)
+
+ CCU_RESET(RST_ACE, 0x148, 16)
+
+ CCU_RESET(RST_LVDS, 0x14c, 0)
+
+ CCU_RESET(RST_GPU, 0x154, 30)
+
+ CCU_RESET(RST_HDMI_H, 0x170, 0)
+ CCU_RESET(RST_HDMI_SYS, 0x170, 1)
+ CCU_RESET(RST_HDMI_AUDIO_DMA, 0x170, 2)
+};
+
+static struct aw_ccung_gate a10_ccu_gates[] = {
+ CCU_GATE(CLK_HOSC, "hosc", "osc24M", 0x50, 0)
+
+ CCU_GATE(CLK_AHB_OTG, "ahb-otg", "ahb", 0x60, 0)
+ CCU_GATE(CLK_AHB_EHCI0, "ahb-ehci0", "ahb", 0x60, 1)
+ CCU_GATE(CLK_AHB_OHCI0, "ahb-ohci0", "ahb", 0x60, 2)
+ CCU_GATE(CLK_AHB_EHCI1, "ahb-ehci1", "ahb", 0x60, 3)
+ CCU_GATE(CLK_AHB_OHCI1, "ahb-ohci1", "ahb", 0x60, 4)
+ CCU_GATE(CLK_AHB_SS, "ahb-ss", "ahb", 0x60, 5)
+ CCU_GATE(CLK_AHB_DMA, "ahb-dma", "ahb", 0x60, 6)
+ CCU_GATE(CLK_AHB_BIST, "ahb-bist", "ahb", 0x60, 7)
+ CCU_GATE(CLK_AHB_MMC0, "ahb-mmc0", "ahb", 0x60, 8)
+ CCU_GATE(CLK_AHB_MMC1, "ahb-mmc1", "ahb", 0x60, 9)
+ CCU_GATE(CLK_AHB_MMC2, "ahb-mmc2", "ahb", 0x60, 10)
+ CCU_GATE(CLK_AHB_MMC3, "ahb-mmc3", "ahb", 0x60, 11)
+ CCU_GATE(CLK_AHB_MS, "ahb-ms", "ahb", 0x60, 12)
+ CCU_GATE(CLK_AHB_NAND, "ahb-nand", "ahb", 0x60, 13)
+ CCU_GATE(CLK_AHB_SDRAM, "ahb-sdram", "ahb", 0x60, 14)
+ CCU_GATE(CLK_AHB_ACE, "ahb-ace", "ahb", 0x60, 16)
+ CCU_GATE(CLK_AHB_EMAC, "ahb-emac", "ahb", 0x60, 17)
+ CCU_GATE(CLK_AHB_TS, "ahb-ts", "ahb", 0x60, 18)
+ CCU_GATE(CLK_AHB_SPI0, "ahb-spi0", "ahb", 0x60, 20)
+ CCU_GATE(CLK_AHB_SPI1, "ahb-spi1", "ahb", 0x60, 21)
+ CCU_GATE(CLK_AHB_SPI2, "ahb-spi2", "ahb", 0x60, 22)
+ CCU_GATE(CLK_AHB_SPI3, "ahb-spi3", "ahb", 0x60, 23)
+ CCU_GATE(CLK_AHB_SATA, "ahb-sata", "ahb", 0x60, 25)
+
+ CCU_GATE(CLK_AHB_VE, "ahb-ve", "ahb", 0x64, 0)
+ CCU_GATE(CLK_AHB_TVD, "ahb-tvd", "ahb", 0x64, 1)
+ CCU_GATE(CLK_AHB_TVE0, "ahb-tve0", "ahb", 0x64, 2)
+ CCU_GATE(CLK_AHB_TVE1, "ahb-tve1", "ahb", 0x64, 3)
+ CCU_GATE(CLK_AHB_LCD0, "ahb-lcd0", "ahb", 0x64, 4)
+ CCU_GATE(CLK_AHB_LCD1, "ahb-lcd1", "ahb", 0x64, 5)
+ CCU_GATE(CLK_AHB_CSI0, "ahb-csi0", "ahb", 0x64, 8)
+ CCU_GATE(CLK_AHB_CSI1, "ahb-csi1", "ahb", 0x64, 9)
+ CCU_GATE(CLK_AHB_HDMI1, "ahb-hdmi1", "ahb", 0x64, 10)
+ CCU_GATE(CLK_AHB_HDMI0, "ahb-hdmi0", "ahb", 0x64, 11)
+ CCU_GATE(CLK_AHB_DE_BE0, "ahb-de_be0", "ahb", 0x64, 12)
+ CCU_GATE(CLK_AHB_DE_BE1, "ahb-de_be1", "ahb", 0x64, 13)
+ CCU_GATE(CLK_AHB_DE_FE0, "ahb-de_fe0", "ahb", 0x64, 14)
+ CCU_GATE(CLK_AHB_DE_FE1, "ahb-de_fe1", "ahb", 0x64, 15)
+ CCU_GATE(CLK_AHB_GMAC, "ahb-gmac", "ahb", 0x64, 17)
+ CCU_GATE(CLK_AHB_MP, "ahb-mp", "ahb", 0x64, 18)
+ CCU_GATE(CLK_AHB_GPU, "ahb-gpu", "ahb", 0x64, 20)
+
+ CCU_GATE(CLK_APB0_CODEC, "apb0-codec", "apb0", 0x68, 0)
+ CCU_GATE(CLK_APB0_SPDIF, "apb0-spdif", "apb0", 0x68, 1)
+ CCU_GATE(CLK_APB0_AC97, "apb0-ac97", "apb0", 0x68, 2)
+ CCU_GATE(CLK_APB0_I2S0, "apb0-i2s0", "apb0", 0x68, 3)
+ CCU_GATE(CLK_APB0_I2S1, "apb0-i2s1", "apb0", 0x68, 4)
+ CCU_GATE(CLK_APB0_PIO, "apb0-pi0", "apb0", 0x68, 5)
+ CCU_GATE(CLK_APB0_IR0, "apb0-ir0", "apb0", 0x68, 6)
+ CCU_GATE(CLK_APB0_IR1, "apb0-ir1", "apb0", 0x68, 7)
+ CCU_GATE(CLK_APB0_I2S2, "apb0-i2s2", "apb0",0x68, 8)
+ CCU_GATE(CLK_APB0_KEYPAD, "apb0-keypad", "apb0", 0x68, 10)
+
+ CCU_GATE(CLK_APB1_I2C0, "apb1-i2c0", "apb1", 0x6c, 0)
+ CCU_GATE(CLK_APB1_I2C1, "apb1-i2c1", "apb1",0x6c, 1)
+ CCU_GATE(CLK_APB1_I2C2, "apb1-i2c2", "apb1",0x6c, 2)
+ CCU_GATE(CLK_APB1_I2C3, "apb1-i2c3", "apb1",0x6c, 3)
+ CCU_GATE(CLK_APB1_CAN, "apb1-can", "apb1",0x6c, 4)
+ CCU_GATE(CLK_APB1_SCR, "apb1-scr", "apb1",0x6c, 5)
+ CCU_GATE(CLK_APB1_PS20, "apb1-ps20", "apb1",0x6c, 6)
+ CCU_GATE(CLK_APB1_PS21, "apb1-ps21", "apb1",0x6c, 7)
+ CCU_GATE(CLK_APB1_I2C4, "apb1-i2c4", "apb1", 0x6c, 15)
+ CCU_GATE(CLK_APB1_UART0, "apb1-uart0", "apb1",0x6c, 16)
+ CCU_GATE(CLK_APB1_UART1, "apb1-uart1", "apb1",0x6c, 17)
+ CCU_GATE(CLK_APB1_UART2, "apb1-uart2", "apb1",0x6c, 18)
+ CCU_GATE(CLK_APB1_UART3, "apb1-uart3", "apb1",0x6c, 19)
+ CCU_GATE(CLK_APB1_UART4, "apb1-uart4", "apb1",0x6c, 20)
+ CCU_GATE(CLK_APB1_UART5, "apb1-uart5", "apb1",0x6c, 21)
+ CCU_GATE(CLK_APB1_UART6, "apb1-uart6", "apb1",0x6c, 22)
+ CCU_GATE(CLK_APB1_UART7, "apb1-uart7", "apb1",0x6c, 23)
+
+ CCU_GATE(CLK_USB_OHCI0, "usb-ohci0", "ahb", 0xcc, 6)
+ CCU_GATE(CLK_USB_OHCI1, "usb-ohci1", "ahb", 0xcc, 7)
+ CCU_GATE(CLK_USB_PHY, "usb-phy", "ahb", 0xcc, 8)
+
+ CCU_GATE(CLK_DRAM_VE, "dram-ve", "pll_ddr", 0x100, 0)
+ CCU_GATE(CLK_DRAM_CSI0, "dram-csi0", "pll_ddr", 0x100, 1)
+ CCU_GATE(CLK_DRAM_CSI1, "dram-csi1", "pll_ddr", 0x100, 2)
+ CCU_GATE(CLK_DRAM_TS, "dram-ts", "pll_ddr", 0x100, 3)
+ CCU_GATE(CLK_DRAM_TVD, "dram-tvd", "pll_ddr", 0x100, 4)
+ CCU_GATE(CLK_DRAM_TVE0, "dram-tve0", "pll_ddr", 0x100, 5)
+ CCU_GATE(CLK_DRAM_TVE1, "dram-tve1", "pll_ddr", 0x100, 6)
+ CCU_GATE(CLK_DRAM_OUT, "dram-out", "pll_ddr", 0x100, 15)
+ CCU_GATE(CLK_DRAM_DE_FE1, "dram-de_fe1", "pll_ddr", 0x100, 24)
+ CCU_GATE(CLK_DRAM_DE_FE0, "dram-de_fe0", "pll_ddr", 0x100, 25)
+ CCU_GATE(CLK_DRAM_DE_BE0, "dram-de_be0", "pll_ddr", 0x100, 26)
+ CCU_GATE(CLK_DRAM_DE_BE1, "dram-de_be1", "pll_ddr", 0x100, 27)
+ CCU_GATE(CLK_DRAM_MP, "dram-de_mp", "pll_ddr", 0x100, 28)
+ CCU_GATE(CLK_DRAM_ACE, "dram-ace", "pll_ddr", 0x100, 29)
+};
+
+static const char *pll_parents[] = {"osc24M"};
+NKMP_CLK(pll_core_clk,
+ CLK_PLL_CORE, /* id */
+ "pll_core", pll_parents, /* name, parents */
+ 0x00, /* offset */
+ 8, 5, 0, AW_CLK_FACTOR_ZERO_IS_ONE, /* n factor */
+ 4, 2, 0, 0, /* k factor */
+ 0, 2, 0, 0, /* m factor */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* p factor */
+ 31, /* gate */
+ 0, 0, /* lock */
+ AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK_WITH_FRAC(pll_video0_clk,
+ CLK_PLL_VIDEO0, /* id */
+ "pll_video0", pll_parents, /* name, parents */
+ 0x10, /* offset */
+ 0, 7, 0, 0, /* n factor */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
+ 31, 0, 0, /* gate, lock, lock retries */
+ AW_CLK_HAS_GATE, /* flags */
+ 270000000, 297000000, /* freq0, freq1 */
+ 15, 14); /* mode sel, freq sel */
+static const char *pll_video0_2x_parents[] = {"pll_video0"};
+FIXED_CLK(pll_video0_2x_clk,
+ CLK_PLL_VIDEO0_2X, /* id */
+ "pll_video0-2x", pll_video0_2x_parents, /* name, parents */
+ 0, /* freq */
+ 2, /* mult */
+ 1, /* div */
+ 0); /* flags */
+
+NM_CLK_WITH_FRAC(pll_video1_clk,
+ CLK_PLL_VIDEO1, /* id */
+ "pll_video1", pll_parents, /* name, parents */
+ 0x30, /* offset */
+ 0, 7, 0, 0, /* n factor */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
+ 31, 0, 0, /* gate, lock, lock retries */
+ AW_CLK_HAS_GATE, /* flags */
+ 270000000, 297000000, /* freq0, freq1 */
+ 15, 14); /* mode sel, freq sel */
+static const char *pll_video1_2x_parents[] = {"pll_video1"};
+FIXED_CLK(pll_video1_2x_clk,
+ CLK_PLL_VIDEO1_2X, /* id */
+ "pll_video1-2x", pll_video1_2x_parents, /* name, parents */
+ 0, /* freq */
+ 2, /* mult */
+ 1, /* div */
+ 0); /* flags */
+
+static const char *cpu_parents[] = {"osc32k", "osc24M", "pll_core", "pll_periph"};
+static const char *axi_parents[] = {"cpu"};
+static const char *ahb_parents[] = {"axi", "pll_periph", "pll6"};
+static const char *apb0_parents[] = {"ahb"};
+static const char *apb1_parents[] = {"osc24M", "pll_periph", "osc32k"};
+MUX_CLK(cpu_clk,
+ CLK_CPU, /* id */
+ "cpu", cpu_parents, /* name, parents */
+ 0x54, 16, 2); /* offset, shift, width */
+NM_CLK(axi_clk,
+ CLK_AXI, /* id */
+ "axi", axi_parents, /* name, parents */
+ 0x54, /* offset */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
+ 0, 2, 0, 0, /* m factor */
+ 0, 0, /* mux */
+ 0, /* gate */
+ 0); /* flags */
+NM_CLK(ahb_clk,
+ CLK_AHB, /* id */
+ "ahb", ahb_parents, /* name, parents */
+ 0x54, /* offset */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
+ 4, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* m factor */
+ 6, 2, /* mux */
+ 0, /* gate */
+ AW_CLK_HAS_MUX); /* flags */
+NM_CLK(apb0_clk,
+ CLK_APB0, /* id */
+ "apb0", apb0_parents, /* name, parents */
+ 0x54, /* offset */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
+ 8, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO |
+ AW_CLK_FACTOR_ZERO_IS_ONE, /* m factor */
+ 0, 0, /* mux */
+ 0, /* gate */
+ 0); /* flags */
+
+NM_CLK(apb1_clk,
+ CLK_APB1, /* id */
+ "apb1", apb1_parents, /* name, parents */
+ 0x58, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 5, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 0, /* gate */
+ AW_CLK_HAS_MUX); /* flags */
+
+
+NKMP_CLK(pll_ddr_other_clk,
+ CLK_PLL_DDR_OTHER, /* id */
+ "pll_ddr_other", pll_parents, /* name, parents */
+ 0x20, /* offset */
+ 8, 5, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
+ 4, 2, 0, 0, /* k factor */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
+ 2, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* p factor */
+ 31, /* gate */
+ 0, 0, /* lock */
+ AW_CLK_HAS_GATE); /* flags */
+NKMP_CLK(pll_ddr_clk,
+ CLK_PLL_DDR, /* id */
+ "pll_ddr", pll_parents, /* name, parents */
+ 0x20, /* offset */
+ 8, 5, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
+ 4, 2, 0, 0, /* k factor */
+ 0, 2, 0, 0, /* m factor */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
+ 31, /* gate */
+ 0, 0, /* lock */
+ AW_CLK_HAS_GATE); /* flags */
+
+NKMP_CLK(pll6_clk,
+ CLK_PLL6, /* id */
+ "pll6", pll_parents, /* name, parents */
+ 0x28, /* offset */
+ 8, 5, 0, AW_CLK_FACTOR_ZERO_BASED, /* n factor */
+ 4, 2, 0, 0, /* k factor */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* p factor (fake) */
+ 31, /* gate */
+ 0, 0, /* lock */
+ AW_CLK_HAS_GATE); /* flags */
+
+static const char *pll6_parents[] = {"pll6"};
+FIXED_CLK(pll_periph_clk,
+ CLK_PLL_PERIPH, /* id */
+ "pll_periph", pll6_parents, /* name, parents */
+ 0, /* freq */
+ 1, /* mult */
+ 2, /* div */
+ 0); /* flags */
+NKMP_CLK(pll_periph_sata_clk,
+ CLK_PLL_SATA, /* id */
+ "pll_periph_sata", pll6_parents, /* name, parents */
+ 0x28, /* offset */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* k factor (fake) */
+ 0, 2, 0, 0, /* m factor */
+ 0, 0, 6, AW_CLK_FACTOR_FIXED, /* p factor (fake, 6) */
+ 14, /* gate */
+ 0, 0, /* lock */
+ AW_CLK_HAS_GATE); /* flags */
+
+static const char *mod_parents[] = {"osc24M", "pll_periph", "pll_ddr_other"};
+NM_CLK(nand_clk,
+ CLK_NAND, /* id */
+ "nand", mod_parents, /* name, parents */
+ 0x80, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(ms_clk,
+ CLK_MS, /* id */
+ "ms", mod_parents, /* name, parents */
+ 0x84, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(mmc0_clk,
+ CLK_MMC0, /* id */
+ "mmc0", mod_parents, /* name, parents */
+ 0x88, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE |
+ AW_CLK_REPARENT); /* flags */
+
+NM_CLK(mmc1_clk,
+ CLK_MMC1, /* id */
+ "mmc1", mod_parents, /* name, parents */
+ 0x8c, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE |
+ AW_CLK_REPARENT); /* flags */
+
+NM_CLK(mmc2_clk,
+ CLK_MMC2, /* id */
+ "mmc2", mod_parents, /* name, parents */
+ 0x90, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE |
+ AW_CLK_REPARENT); /* flags */
+
+NM_CLK(mmc3_clk,
+ CLK_MMC3, /* id */
+ "mmc3", mod_parents, /* name, parents */
+ 0x94, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE |
+ AW_CLK_REPARENT); /* flags */
+
+NM_CLK(ts_clk,
+ CLK_TS, /* id */
+ "ts", mod_parents, /* name, parents */
+ 0x94, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(ss_clk,
+ CLK_SS, /* id */
+ "ss", mod_parents, /* name, parents */
+ 0x9c, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(spi0_clk,
+ CLK_SPI0, /* id */
+ "spi0", mod_parents, /* name, parents */
+ 0xa0, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(spi1_clk,
+ CLK_SPI1, /* id */
+ "spi1", mod_parents, /* name, parents */
+ 0xa4, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(spi2_clk,
+ CLK_SPI2, /* id */
+ "spi2", mod_parents, /* name, parents */
+ 0xa8, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+/* MISSING CLK_PATA */
+
+NM_CLK(ir0_clk,
+ CLK_IR0, /* id */
+ "ir0", mod_parents, /* name, parents */
+ 0xb0, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(ir1_clk,
+ CLK_IR1, /* id */
+ "ir1", mod_parents, /* name, parents */
+ 0xb4, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+/* MISSING CLK_I2S0, CLK_AC97, CLK_SPDIF */
+
+static const char *keypad_parents[] = {"osc24M", "osc24M", "osc32k"};
+NM_CLK(keypad_clk,
+ CLK_KEYPAD, /* id */
+ "keypad", keypad_parents, /* name, parents */
+ 0xc4, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 5, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+static const char *sata_parents[] = {"pll_periph_sata", "osc32k"};
+NM_CLK(sata_clk,
+ CLK_SATA, /* id */
+ "sata", sata_parents, /* name, parents */
+ 0xc8, /* offset */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* n factor (fake) */
+ 0, 0, 1, AW_CLK_FACTOR_FIXED, /* m factor (fake) */
+ 24, 1, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+NM_CLK(spi3_clk,
+ CLK_SPI3, /* id */
+ "spi3", mod_parents, /* name, parents */
+ 0xd4, /* offset */
+ 16, 2, 0, AW_CLK_FACTOR_POWER_OF_TWO, /* n factor */
+ 0, 4, 0, 0, /* m factor */
+ 24, 2, /* mux */
+ 31, /* gate */
+ AW_CLK_HAS_MUX | AW_CLK_HAS_GATE); /* flags */
+
+/* MISSING CLK_I2S1, CLK_I2S2, DE Clocks */
+
+static struct aw_clk_nkmp_def *nkmp_clks[] = {
+ &pll_core_clk,
+ &pll_ddr_other_clk,
+ &pll_ddr_clk,
+ &pll6_clk,
+ &pll_periph_sata_clk,
+};
+
+static struct aw_clk_nm_def *nm_clks[] = {
+ &axi_clk,
+ &ahb_clk,
+ &apb0_clk,
+ &apb1_clk,
+ &pll_video0_clk,
+ &pll_video1_clk,
+ &nand_clk,
+ &ms_clk,
+ &mmc0_clk,
+ &mmc1_clk,
+ &mmc2_clk,
+ &mmc3_clk,
+ &ts_clk,
+ &ss_clk,
+ &spi0_clk,
+ &spi1_clk,
+ &spi2_clk,
+ &ir0_clk,
+ &ir1_clk,
+ &keypad_clk,
+ &sata_clk,
+ &spi3_clk,
+};
+
+static struct aw_clk_prediv_mux_def *prediv_mux_clks[] = {
+};
+
+static struct clk_mux_def *mux_clks[] = {
+ &cpu_clk,
+};
+
+static struct clk_div_def *div_clks[] = {
+};
+
+static struct clk_fixed_def *fixed_factor_clks[] = {
+ &pll_periph_clk,
+ &pll_video0_2x_clk,
+ &pll_video1_2x_clk,
+};
+
+static struct aw_clk_init init_clks[] = {
+};
+
+void
+ccu_a10_register_clocks(struct aw_ccung_softc *sc)
+{
+ int i;
+
+ sc->resets = a10_ccu_resets;
+ sc->nresets = nitems(a10_ccu_resets);
+ sc->gates = a10_ccu_gates;
+ sc->ngates = nitems(a10_ccu_gates);
+ sc->clk_init = init_clks;
+ sc->n_clk_init = nitems(init_clks);
+
+ for (i = 0; i < nitems(nkmp_clks); i++)
+ aw_clk_nkmp_register(sc->clkdom, nkmp_clks[i]);
+ for (i = 0; i < nitems(nm_clks); i++)
+ aw_clk_nm_register(sc->clkdom, nm_clks[i]);
+ for (i = 0; i < nitems(prediv_mux_clks); i++)
+ aw_clk_prediv_mux_register(sc->clkdom, prediv_mux_clks[i]);
+
+ for (i = 0; i < nitems(mux_clks); i++)
+ clknode_mux_register(sc->clkdom, mux_clks[i]);
+ for (i = 0; i < nitems(div_clks); i++)
+ clknode_div_register(sc->clkdom, div_clks[i]);
+ for (i = 0; i < nitems(fixed_factor_clks); i++)
+ clknode_fixed_register(sc->clkdom, fixed_factor_clks[i]);
+}
+
+void
+ccu_a20_register_clocks(struct aw_ccung_softc *sc)
+{
+
+ /* XXX TODO: Implement the A20-specific clocks */
+ ccu_a10_register_clocks(sc);
+}
Added: head/sys/arm/allwinner/clkng/ccu_a10.h
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ head/sys/arm/allwinner/clkng/ccu_a10.h Thu Jun 14 17:50:29 2018 (r335165)
@@ -0,0 +1,36 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2018 Kyle Evans <kevans at FreeBSD.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef __CCU_A10_H__
+#define __CCU_A10_H__
+
+void ccu_a10_register_clocks(struct aw_ccung_softc *sc);
+void ccu_a20_register_clocks(struct aw_ccung_softc *sc);
+
+#endif /* __CCU_A10_H__ */
More information about the svn-src-all
mailing list