svn commit: r329159 - in stable/11/sys: amd64/conf conf dev/mlx4 dev/mlx4/mlx4_core dev/mlx4/mlx4_en dev/mlx4/mlx4_ib i386/conf modules modules/mlx4 modules/mlx4en modules/mlx4ib modules/mlxen ofed...
Hans Petter Selasky
hselasky at FreeBSD.org
Mon Feb 12 13:56:58 UTC 2018
Author: hselasky
Date: Mon Feb 12 13:56:57 2018
New Revision: 329159
URL: https://svnweb.freebsd.org/changeset/base/329159
Log:
MFC r306486-r325841:
Update the mlx4, mlx4ib(4) and mlx4en(4) drivers to match FreeBSD-head
prior to the Linux 4.9 RoCE/infiniband upgrade.
Sponsored by: Mellanox Technologies
MFC r306486:
Move the ConnectX-3 and ConnectX-2 driver from sys/ofed into sys/dev/mlx4
like other PCI network drivers. The sys/ofed directory is now mainly
reserved for generic infiniband code, with exception of the mthca driver.
- Add new manual page, mlx4en(4), describing how to configure and load
mlx4en.
- All relevant driver C-files are now prefixed mlx4, mlx4_en and
mlx4_ib respectivly to avoid object filename collisions when compiling
the kernel. This also fixes an issue with proper dependency file
generation for the C-files in question.
- Device mlxen is now device mlx4en and depends on device mlx4, see
mlx4en(4). Only the network device name remains unchanged.
- The mlx4 and mlx4en modules are now built by default on i386 and
amd64 targets. Only building the mlx4ib module depends on
WITH_OFED=YES .
Sponsored by: Mellanox Technologies
MFC r310425:
mlx: avoid use of __DATE__ to make build reproducible
Reviewed by: hselasky
Differential Revision: https://reviews.freebsd.org/D8886
MFC r310488:
mlx(4): remove date from log message
Further to r310425, go one step further and just remove the date.
Reviewed by: hselasky
Differential Revision: https://reviews.freebsd.org/D8888
MFC r324200:
Implement SIOCGIFRSS{KEY,HASH} for the mlx4en(4) driver.
Differential Revision: https://reviews.freebsd.org/D12176
Sponsored by: Mellanox Technologies
MFC r324201:
Setup mbuf hash type properly when receiving IP packets in the mlx4en(4) driver.
Submitted by: sephe@
Differential Revision: https://reviews.freebsd.org/D12229
Sponsored by: Mellanox Technologies
MFC r324621:
mlx4: use enum constants instead of const vars for case exprs
Follow up from r324201 to fix compilation with gcc, which complains
about non-ICE case expressions.
Reviewed by: hselasky
Differential Revision: https://reviews.freebsd.org/D12675
MFC r325841:
Update the mlx4 core and mlx4en(4) modules towards Linux v4.9.
Background:
The coming ibcore update forces an update of mlx4ib(4) which in turn requires
an updated mlx4 core module. This also affects the mlx4en(4) module because
commonly used APIs are updated. This commit is a middle step updating the
mlx4 modules towards the new ibcore.
This change contains no major new features.
Changes in mlx4:
a) Improved error handling when mlx4 PCI devices are
detached inside VMs.
b) Major update of codebase towards Linux 4.9.
Changes in mlx4ib(4):
a) Minimal changes needed in order to compile using the
updated mlx4 core APIs.
Changes in mlx4en(4):
a) Update flow steering code in mlx4en to use new APIs for
registering MAC addresses and IP addresses.
b) Update all statistics counters to be 64-bit.
c) Minimal changes needed in order to compile using the
updated mlx4 core APIs.
Sponsored by: Mellanox Technologies
Added:
stable/11/sys/dev/mlx4/
- copied from r306486, head/sys/dev/mlx4/
stable/11/sys/dev/mlx4/mlx4_core/fw_qos.h (contents, props changed)
stable/11/sys/dev/mlx4/mlx4_core/mlx4_fw_qos.c (contents, props changed)
stable/11/sys/modules/mlx4en/
- copied from r306486, head/sys/modules/mlx4en/
Deleted:
stable/11/sys/dev/mlx4/mlx4_core/mlx4_sys_tune.c
stable/11/sys/modules/mlxen/
stable/11/sys/ofed/drivers/infiniband/hw/mlx4/
stable/11/sys/ofed/drivers/net/
stable/11/sys/ofed/include/linux/
Modified:
stable/11/sys/amd64/conf/NOTES
stable/11/sys/conf/files
stable/11/sys/dev/mlx4/cmd.h
stable/11/sys/dev/mlx4/cq.h
stable/11/sys/dev/mlx4/device.h
stable/11/sys/dev/mlx4/driver.h
stable/11/sys/dev/mlx4/mlx4_core/fw.h
stable/11/sys/dev/mlx4/mlx4_core/icm.h
stable/11/sys/dev/mlx4/mlx4_core/mlx4.h
stable/11/sys/dev/mlx4/mlx4_core/mlx4_alloc.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_catas.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_cmd.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_cq.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_eq.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_fw.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_icm.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_intf.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_main.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_mcg.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_mr.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_pd.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_port.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_profile.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_qp.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_reset.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_resource_tracker.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_sense.c
stable/11/sys/dev/mlx4/mlx4_core/mlx4_srq.c
stable/11/sys/dev/mlx4/mlx4_en/en.h
stable/11/sys/dev/mlx4/mlx4_en/en_port.h
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_cq.c
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_main.c
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_netdev.c
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_port.c
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_resources.c
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_rx.c
stable/11/sys/dev/mlx4/mlx4_en/mlx4_en_tx.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib.h
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_cq.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_mad.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_main.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_mr.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_srq.c
stable/11/sys/dev/mlx4/mlx4_ib/mlx4_ib_sysfs.c
stable/11/sys/dev/mlx4/qp.h
stable/11/sys/dev/mlx4/stats.h
stable/11/sys/i386/conf/NOTES
stable/11/sys/modules/Makefile
stable/11/sys/modules/mlx4/Makefile
stable/11/sys/modules/mlx4en/Makefile
stable/11/sys/modules/mlx4ib/Makefile
Directory Properties:
stable/11/ (props changed)
Modified: stable/11/sys/amd64/conf/NOTES
==============================================================================
--- stable/11/sys/amd64/conf/NOTES Mon Feb 12 13:52:58 2018 (r329158)
+++ stable/11/sys/amd64/conf/NOTES Mon Feb 12 13:56:57 2018 (r329159)
@@ -324,7 +324,7 @@ options DRM_DEBUG # Include debug printfs (slow)
# ixl: Intel XL710 40Gbe PCIE Ethernet
# ixlv: Intel XL710 40Gbe VF PCIE Ethernet
# mlx4ib: Mellanox ConnectX HCA InfiniBand
-# mlxen: Mellanox ConnectX HCA Ethernet
+# mlx4en: Mellanox ConnectX HCA Ethernet
# mthca: Mellanox HCA InfiniBand
# nfe: nVidia nForce MCP on-board Ethernet Networking (BSD open source)
# sfxge: Solarflare SFC9000 family 10Gb Ethernet adapters
@@ -343,8 +343,9 @@ device iwn # Intel 4965/1000/5000/6000 wireless NICs
device ixl # Intel XL710 40Gbe PCIE Ethernet
options IXL_IW # Enable iWARP Client Interface in ixl(4)
device ixlv # Intel XL710 40Gbe VF PCIE Ethernet
+device mlx4 # Shared code module between IB and Ethernet
device mlx4ib # Mellanox ConnectX HCA InfiniBand
-device mlxen # Mellanox ConnectX HCA Ethernet
+device mlx4en # Mellanox ConnectX HCA Ethernet
device mthca # Mellanox HCA InfiniBand
device nfe # nVidia nForce MCP on-board Ethernet
device sfxge # Solarflare SFC9000 10Gb Ethernet
Modified: stable/11/sys/conf/files
==============================================================================
--- stable/11/sys/conf/files Mon Feb 12 13:52:58 2018 (r329158)
+++ stable/11/sys/conf/files Mon Feb 12 13:56:57 2018 (r329159)
@@ -4286,131 +4286,90 @@ ofed/drivers/infiniband/ulp/sdp/sdp_cma.c optional sdp
ofed/drivers/infiniband/ulp/sdp/sdp_tx.c optional sdp inet \
compile-with "${OFED_C} -I$S/ofed/drivers/infiniband/ulp/sdp/"
-ofed/drivers/infiniband/hw/mlx4/alias_GUID.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/mcg.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/sysfs.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/cm.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/ah.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/cq.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/doorbell.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/mad.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/main.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/mlx4_exp.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/mr.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/qp.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/srq.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
-ofed/drivers/infiniband/hw/mlx4/wc.c optional mlx4ib \
- no-depend obj-prefix "mlx4ib_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/infiniband/hw/mlx4/"
+dev/mlx4/mlx4_ib/mlx4_ib_alias_GUID.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_mcg.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_sysfs.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_cm.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_ah.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_cq.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_doorbell.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_mad.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_main.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_exp.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_mr.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_qp.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_srq.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_ib/mlx4_ib_wc.c optional mlx4ib pci ofed \
+ compile-with "${OFED_C}"
-ofed/drivers/net/mlx4/alloc.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/catas.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/cmd.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/cq.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/eq.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/fw.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/icm.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/intf.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/main.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/mcg.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/ -Wno-unused"
-ofed/drivers/net/mlx4/mr.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/pd.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/port.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/profile.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/qp.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/reset.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/sense.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/srq.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/resource_tracker.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/sys_tune.c optional mlx4ib | mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
+dev/mlx4/mlx4_core/mlx4_alloc.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_catas.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_cmd.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_cq.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_eq.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_fw.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_fw_qos.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_icm.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_intf.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_main.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_mcg.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_mr.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_pd.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_port.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_profile.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_qp.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_reset.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_sense.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_srq.c optional mlx4 pci \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_core/mlx4_resource_tracker.c optional mlx4 pci \
+ compile-with "${OFED_C}"
-ofed/drivers/net/mlx4/en_cq.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/en_main.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/en_netdev.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/en_port.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/en_resources.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/en_rx.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
-ofed/drivers/net/mlx4/en_tx.c optional mlxen \
- no-depend obj-prefix "mlx4_" \
- compile-with "${OFED_C_NOIMP} -I$S/ofed/drivers/net/mlx4/"
+dev/mlx4/mlx4_en/mlx4_en_cq.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_en/mlx4_en_main.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_en/mlx4_en_netdev.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_en/mlx4_en_port.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_en/mlx4_en_resources.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_en/mlx4_en_rx.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
+dev/mlx4/mlx4_en/mlx4_en_tx.c optional mlx4en pci inet inet6 \
+ compile-with "${OFED_C}"
dev/mlx5/mlx5_ib/mlx5_ib_ah.c optional mlx5ib pci ofed \
compile-with "${OFED_C}"
Modified: stable/11/sys/dev/mlx4/cmd.h
==============================================================================
--- head/sys/dev/mlx4/cmd.h Fri Sep 30 08:23:06 2016 (r306486)
+++ stable/11/sys/dev/mlx4/cmd.h Mon Feb 12 13:56:57 2018 (r329159)
@@ -36,6 +36,8 @@
#include <linux/dma-mapping.h>
#include <linux/types.h>
+struct mlx4_counter;
+
enum {
/* initialization and general commands */
MLX4_CMD_SYS_EN = 0x1,
@@ -67,8 +69,13 @@ enum {
MLX4_CMD_MAP_ICM_AUX = 0xffc,
MLX4_CMD_UNMAP_ICM_AUX = 0xffb,
MLX4_CMD_SET_ICM_SIZE = 0xffd,
+ MLX4_CMD_ACCESS_REG = 0x3b,
+ MLX4_CMD_ALLOCATE_VPP = 0x80,
+ MLX4_CMD_SET_VPORT_QOS = 0x81,
+
/*master notify fw on finish for slave's flr*/
MLX4_CMD_INFORM_FLR_DONE = 0x5b,
+ MLX4_CMD_VIRT_PORT_MAP = 0x5c,
MLX4_CMD_GET_OP_REQ = 0x59,
/* TPT commands */
@@ -116,6 +123,7 @@ enum {
/* special QP and management commands */
MLX4_CMD_CONF_SPECIAL_QP = 0x23,
MLX4_CMD_MAD_IFC = 0x24,
+ MLX4_CMD_MAD_DEMUX = 0x203,
/* multicast commands */
MLX4_CMD_READ_MCG = 0x25,
@@ -125,6 +133,7 @@ enum {
/* miscellaneous commands */
MLX4_CMD_DIAG_RPRT = 0x30,
MLX4_CMD_NOP = 0x31,
+ MLX4_CMD_CONFIG_DEV = 0x3a,
MLX4_CMD_ACCESS_MEM = 0x2e,
MLX4_CMD_SET_VEP = 0x52,
@@ -158,6 +167,9 @@ enum {
MLX4_QP_FLOW_STEERING_ATTACH = 0x65,
MLX4_QP_FLOW_STEERING_DETACH = 0x66,
MLX4_FLOW_STEERING_IB_UC_QP_RANGE = 0x64,
+
+ /* Update and read QCN parameters */
+ MLX4_CMD_CONGESTION_CTRL_OPCODE = 0x68,
};
enum {
@@ -167,27 +179,85 @@ enum {
};
enum {
+ /* virtual to physical port mapping opcode modifiers */
+ MLX4_GET_PORT_VIRT2PHY = 0x0,
+ MLX4_SET_PORT_VIRT2PHY = 0x1,
+};
+
+enum {
MLX4_MAILBOX_SIZE = 4096,
MLX4_ACCESS_MEM_ALIGN = 256,
};
enum {
- /* set port opcode modifiers */
- MLX4_SET_PORT_GENERAL = 0x0,
- MLX4_SET_PORT_RQP_CALC = 0x1,
- MLX4_SET_PORT_MAC_TABLE = 0x2,
- MLX4_SET_PORT_VLAN_TABLE = 0x3,
- MLX4_SET_PORT_PRIO_MAP = 0x4,
- MLX4_SET_PORT_GID_TABLE = 0x5,
- MLX4_SET_PORT_PRIO2TC = 0x8,
- MLX4_SET_PORT_SCHEDULER = 0x9
+ /* Set port opcode modifiers */
+ MLX4_SET_PORT_IB_OPCODE = 0x0,
+ MLX4_SET_PORT_ETH_OPCODE = 0x1,
+ MLX4_SET_PORT_BEACON_OPCODE = 0x4,
};
enum {
+ /* Set port Ethernet input modifiers */
+ MLX4_SET_PORT_GENERAL = 0x0,
+ MLX4_SET_PORT_RQP_CALC = 0x1,
+ MLX4_SET_PORT_MAC_TABLE = 0x2,
+ MLX4_SET_PORT_VLAN_TABLE = 0x3,
+ MLX4_SET_PORT_PRIO_MAP = 0x4,
+ MLX4_SET_PORT_GID_TABLE = 0x5,
+ MLX4_SET_PORT_PRIO2TC = 0x8,
+ MLX4_SET_PORT_SCHEDULER = 0x9,
+ MLX4_SET_PORT_VXLAN = 0xB,
+ MLX4_SET_PORT_ROCE_ADDR = 0xD
+};
+
+enum {
+ MLX4_CMD_MAD_DEMUX_CONFIG = 0,
+ MLX4_CMD_MAD_DEMUX_QUERY_STATE = 1,
+ MLX4_CMD_MAD_DEMUX_QUERY_RESTR = 2, /* Query mad demux restrictions */
+};
+
+enum {
MLX4_CMD_WRAPPED,
MLX4_CMD_NATIVE
};
+/*
+ * MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP -
+ * Receive checksum value is reported in CQE also for non TCP/UDP packets.
+ *
+ * MLX4_RX_CSUM_MODE_L4 -
+ * L4_CSUM bit in CQE, which indicates whether or not L4 checksum
+ * was validated correctly, is supported.
+ *
+ * MLX4_RX_CSUM_MODE_IP_OK_IP_NON_TCP_UDP -
+ * IP_OK CQE's field is supported also for non TCP/UDP IP packets.
+ *
+ * MLX4_RX_CSUM_MODE_MULTI_VLAN -
+ * Receive Checksum offload is supported for packets with more than 2 vlan headers.
+ */
+enum mlx4_rx_csum_mode {
+ MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP = 1UL << 0,
+ MLX4_RX_CSUM_MODE_L4 = 1UL << 1,
+ MLX4_RX_CSUM_MODE_IP_OK_IP_NON_TCP_UDP = 1UL << 2,
+ MLX4_RX_CSUM_MODE_MULTI_VLAN = 1UL << 3
+};
+
+struct mlx4_config_dev_params {
+ u16 vxlan_udp_dport;
+ u8 rx_csum_flags_port_1;
+ u8 rx_csum_flags_port_2;
+};
+
+enum mlx4_en_congestion_control_algorithm {
+ MLX4_CTRL_ALGO_802_1_QAU_REACTION_POINT = 0,
+};
+
+enum mlx4_en_congestion_control_opmod {
+ MLX4_CONGESTION_CONTROL_GET_PARAMS,
+ MLX4_CONGESTION_CONTROL_GET_STATISTICS,
+ MLX4_CONGESTION_CONTROL_SET_PARAMS = 4,
+};
+
struct mlx4_dev;
struct mlx4_cmd_mailbox {
@@ -233,26 +303,28 @@ static inline int mlx4_cmd_imm(struct mlx4_dev *dev, u
struct mlx4_cmd_mailbox *mlx4_alloc_cmd_mailbox(struct mlx4_dev *dev);
void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
+int mlx4_get_counter_stats(struct mlx4_dev *dev, int counter_index,
+ struct mlx4_counter *counter_stats, int reset);
u32 mlx4_comm_get_version(void);
-int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u8 *mac);
-int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan, u8 qos);
+int mlx4_set_vf_mac(struct mlx4_dev *dev, int port, int vf, u64 mac);
+int mlx4_set_vf_vlan(struct mlx4_dev *dev, int port, int vf, u16 vlan,
+ u8 qos, __be16 proto);
+int mlx4_set_vf_rate(struct mlx4_dev *dev, int port, int vf, int min_tx_rate,
+ int max_tx_rate);
int mlx4_set_vf_spoofchk(struct mlx4_dev *dev, int port, int vf, bool setting);
-int mlx4_set_vf_link_state(struct mlx4_dev *dev, int port, int vf, int link_state);
-int mlx4_get_vf_link_state(struct mlx4_dev *dev, int port, int vf);
+int mlx4_config_dev_retrieval(struct mlx4_dev *dev,
+ struct mlx4_config_dev_params *params);
+void mlx4_cmd_wake_completions(struct mlx4_dev *dev);
+void mlx4_report_internal_err_comm_event(struct mlx4_dev *dev);
/*
* mlx4_get_slave_default_vlan -
- * retrun true if VST ( default vlan)
- * if VST will fill vlan & qos (if not NULL)
+ * return true if VST ( default vlan)
+ * if VST, will return vlan & qos (if not NULL)
*/
-bool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave, u16 *vlan, u8 *qos);
+bool mlx4_get_slave_default_vlan(struct mlx4_dev *dev, int port, int slave,
+ u16 *vlan, u8 *qos);
-enum {
- IFLA_VF_LINK_STATE_AUTO, /* link state of the uplink */
- IFLA_VF_LINK_STATE_ENABLE, /* link always up */
- IFLA_VF_LINK_STATE_DISABLE, /* link always down */
- __IFLA_VF_LINK_STATE_MAX,
-};
-
#define MLX4_COMM_GET_IF_REV(cmd_chan_ver) (u8)((cmd_chan_ver) >> 8)
+#define COMM_CHAN_EVENT_INTERNAL_ERR (1 << 17)
#endif /* MLX4_CMD_H */
Modified: stable/11/sys/dev/mlx4/cq.h
==============================================================================
--- head/sys/dev/mlx4/cq.h Fri Sep 30 08:23:06 2016 (r306486)
+++ stable/11/sys/dev/mlx4/cq.h Mon Feb 12 13:56:57 2018 (r329159)
@@ -42,31 +42,22 @@ struct mlx4_cqe {
__be32 vlan_my_qpn;
__be32 immed_rss_invalid;
__be32 g_mlpath_rqpn;
+ __be16 sl_vid;
union {
struct {
- union {
- struct {
- __be16 sl_vid;
- __be16 rlid;
- };
- __be32 timestamp_16_47;
- };
+ __be16 rlid;
__be16 status;
u8 ipv6_ext_mask;
u8 badfcs_enc;
};
- struct {
- __be16 reserved1;
- u8 smac[6];
- };
+ u8 smac[ETH_ALEN];
};
__be32 byte_cnt;
__be16 wqe_index;
__be16 checksum;
- u8 reserved2[1];
- __be16 timestamp_0_15;
+ u8 reserved[3];
u8 owner_sr_opcode;
-} __packed;
+};
struct mlx4_err_cqe {
__be32 my_qpn;
@@ -95,7 +86,13 @@ struct mlx4_ts_cqe {
} __packed;
enum {
- MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29,
+ MLX4_CQE_L2_TUNNEL_IPOK = 1 << 31,
+ MLX4_CQE_CVLAN_PRESENT_MASK = 1 << 29,
+ MLX4_CQE_SVLAN_PRESENT_MASK = 1 << 30,
+ MLX4_CQE_L2_TUNNEL = 1 << 27,
+ MLX4_CQE_L2_TUNNEL_CSUM = 1 << 26,
+ MLX4_CQE_L2_TUNNEL_IPV4 = 1 << 25,
+
MLX4_CQE_QPN_MASK = 0xffffff,
MLX4_CQE_VID_MASK = 0xfff,
};
@@ -177,5 +174,5 @@ int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_c
u16 count, u16 period);
int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
int entries, struct mlx4_mtt *mtt);
-int mlx4_cq_ignore_overrun(struct mlx4_dev *dev, struct mlx4_cq *cq);
+
#endif /* MLX4_CQ_H */
Modified: stable/11/sys/dev/mlx4/device.h
==============================================================================
--- head/sys/dev/mlx4/device.h Fri Sep 30 08:23:06 2016 (r306486)
+++ stable/11/sys/dev/mlx4/device.h Mon Feb 12 13:56:57 2018 (r329159)
@@ -39,20 +39,21 @@
#include <linux/types.h>
#include <linux/bitops.h>
#include <linux/workqueue.h>
+#include <linux/if_ether.h>
+#include <linux/mutex.h>
+
#include <asm/atomic.h>
#include <linux/clocksource.h>
+#define DEFAULT_UAR_PAGE_SHIFT 12
+
#define MAX_MSIX_P_PORT 17
#define MAX_MSIX 64
-#define MSIX_LEGACY_SZ 4
#define MIN_MSIX_P_PORT 5
+#define MLX4_IS_LEGACY_EQ_MODE(dev_cap) ((dev_cap).num_comp_vectors < \
+ (dev_cap).num_ports * MIN_MSIX_P_PORT)
-#define MLX4_ROCE_MAX_GIDS 128
-#define MLX4_ROCE_PF_GIDS 16
-
-#define MLX4_NUM_UP 8
-#define MLX4_NUM_TC 8
#define MLX4_MAX_100M_UNITS_VAL 255 /*
* work around: can't set values
* greater then this value when
@@ -62,6 +63,9 @@
#define MLX4_RATELIMIT_1G_UNITS 4 /* 1 Gbps */
#define MLX4_RATELIMIT_DEFAULT 0x00ff
+#define MLX4_ROCE_MAX_GIDS 128
+#define MLX4_ROCE_PF_GIDS 16
+
#define CORE_CLOCK_MASK 0xffffffffffffULL
enum {
@@ -70,8 +74,9 @@ enum {
MLX4_FLAG_MASTER = 1 << 2,
MLX4_FLAG_SLAVE = 1 << 3,
MLX4_FLAG_SRIOV = 1 << 4,
- MLX4_FLAG_DEV_NUM_STR = 1 << 5,
- MLX4_FLAG_OLD_REG_MAC = 1 << 6,
+ MLX4_FLAG_OLD_REG_MAC = 1 << 6,
+ MLX4_FLAG_BONDED = 1 << 7,
+ MLX4_FLAG_SECURE_HOST = 1 << 8,
};
enum {
@@ -81,7 +86,8 @@ enum {
enum {
MLX4_MAX_PORTS = 2,
- MLX4_MAX_PORT_PKEYS = 128
+ MLX4_MAX_PORT_PKEYS = 128,
+ MLX4_MAX_PORT_GIDS = 128
};
/* base qkey for use in sriov tunnel-qp/proxy-qp communication.
@@ -92,14 +98,14 @@ enum {
#define MLX4_RESERVED_QKEY_MASK (0xFFFF0000)
enum {
- MLX4_BOARD_ID_LEN = 64,
- MLX4_VSD_LEN = 208
+ MLX4_BOARD_ID_LEN = 64
};
enum {
MLX4_MAX_NUM_PF = 16,
- MLX4_MAX_NUM_VF = 64,
- MLX4_MFUNC_MAX = 80,
+ MLX4_MAX_NUM_VF = 126,
+ MLX4_MAX_NUM_VF_P_PORT = 64,
+ MLX4_MFUNC_MAX = 128,
MLX4_MAX_EQ_NUM = 1024,
MLX4_MFUNC_EQ_NUM = 4,
MLX4_MFUNC_MAX_EQES = 8,
@@ -119,6 +125,14 @@ enum {
MLX4_STEERING_MODE_DEVICE_MANAGED
};
+enum {
+ MLX4_STEERING_DMFS_A0_DEFAULT,
+ MLX4_STEERING_DMFS_A0_DYNAMIC,
+ MLX4_STEERING_DMFS_A0_STATIC,
+ MLX4_STEERING_DMFS_A0_DISABLE,
+ MLX4_STEERING_DMFS_A0_NOT_SUPPORTED
+};
+
static inline const char *mlx4_steering_mode_str(int steering_mode)
{
switch (steering_mode) {
@@ -137,6 +151,11 @@ static inline const char *mlx4_steering_mode_str(int s
}
enum {
+ MLX4_TUNNEL_OFFLOAD_MODE_NONE,
+ MLX4_TUNNEL_OFFLOAD_MODE_VXLAN
+};
+
+enum {
MLX4_DEV_CAP_FLAG_RC = 1LL << 0,
MLX4_DEV_CAP_FLAG_UC = 1LL << 1,
MLX4_DEV_CAP_FLAG_UD = 1LL << 2,
@@ -161,12 +180,10 @@ enum {
MLX4_DEV_CAP_FLAG_UDP_RSS = 1LL << 40,
MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41,
MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42,
- MLX4_DEV_CAP_FLAG_CROSS_CHANNEL = 1LL << 44,
MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48,
- MLX4_DEV_CAP_FLAG_COUNTERS_EXT = 1LL << 49,
- MLX4_DEV_CAP_FLAG_SET_PORT_ETH_SCHED = 1LL << 53,
+ MLX4_DEV_CAP_FLAG_RSS_IP_FRAG = 1LL << 52,
+ MLX4_DEV_CAP_FLAG_SET_ETH_SCHED = 1LL << 53,
MLX4_DEV_CAP_FLAG_SENSE_SUPPORT = 1LL << 55,
- MLX4_DEV_CAP_FLAG_FAST_DROP = 1LL << 57,
MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV = 1LL << 59,
MLX4_DEV_CAP_FLAG_64B_EQE = 1LL << 61,
MLX4_DEV_CAP_FLAG_64B_CQE = 1LL << 62
@@ -177,30 +194,51 @@ enum {
MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1,
MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2,
MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3,
- MLX4_DEV_CAP_FLAG2_FSM = 1LL << 4,
- MLX4_DEV_CAP_FLAG2_VLAN_CONTROL = 1LL << 5,
- MLX4_DEV_CAP_FLAG2_UPDATE_QP = 1LL << 6,
- MLX4_DEV_CAP_FLAG2_LB_SRC_CHK = 1LL << 7,
- MLX4_DEV_CAP_FLAG2_DMFS_IPOIB = 1LL << 8,
- MLX4_DEV_CAP_FLAG2_ETS_CFG = 1LL << 9,
- MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP = 1LL << 10,
- MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN = 1LL << 11,
- MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT = 1LL << 12,
- MLX4_DEV_CAP_FLAG2_TS = 1LL << 13,
- MLX4_DEV_CAP_FLAG2_DRIVER_VERSION_TO_FW = 1LL << 14,
- MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN = 1LL << 15,
- MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS = 1LL << 16,
- MLX4_DEV_CAP_FLAG2_FS_EN_NCSI = 1LL << 17,
+ MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN = 1LL << 4,
+ MLX4_DEV_CAP_FLAG2_TS = 1LL << 5,
+ MLX4_DEV_CAP_FLAG2_VLAN_CONTROL = 1LL << 6,
+ MLX4_DEV_CAP_FLAG2_FSM = 1LL << 7,
+ MLX4_DEV_CAP_FLAG2_UPDATE_QP = 1LL << 8,
+ MLX4_DEV_CAP_FLAG2_DMFS_IPOIB = 1LL << 9,
+ MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS = 1LL << 10,
+ MLX4_DEV_CAP_FLAG2_MAD_DEMUX = 1LL << 11,
+ MLX4_DEV_CAP_FLAG2_CQE_STRIDE = 1LL << 12,
+ MLX4_DEV_CAP_FLAG2_EQE_STRIDE = 1LL << 13,
+ MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL = 1LL << 14,
+ MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP = 1LL << 15,
+ MLX4_DEV_CAP_FLAG2_CONFIG_DEV = 1LL << 16,
+ MLX4_DEV_CAP_FLAG2_SYS_EQS = 1LL << 17,
MLX4_DEV_CAP_FLAG2_80_VFS = 1LL << 18,
- MLX4_DEV_CAP_FLAG2_DMFS_TAG_MODE = 1LL << 19,
- MLX4_DEV_CAP_FLAG2_ROCEV2 = 1LL << 20,
- MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL = 1LL << 21,
- MLX4_DEV_CAP_FLAG2_CQE_STRIDE = 1LL << 22,
- MLX4_DEV_CAP_FLAG2_EQE_STRIDE = 1LL << 23,
- MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB = 1LL << 24,
- MLX4_DEV_CAP_FLAG2_RX_CSUM_MODE = 1LL << 25,
+ MLX4_DEV_CAP_FLAG2_FS_A0 = 1LL << 19,
+ MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT = 1LL << 20,
+ MLX4_DEV_CAP_FLAG2_PORT_REMAP = 1LL << 21,
+ MLX4_DEV_CAP_FLAG2_QCN = 1LL << 22,
+ MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT = 1LL << 23,
+ MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN = 1LL << 24,
+ MLX4_DEV_CAP_FLAG2_QOS_VPP = 1LL << 25,
+ MLX4_DEV_CAP_FLAG2_ETS_CFG = 1LL << 26,
+ MLX4_DEV_CAP_FLAG2_PORT_BEACON = 1LL << 27,
+ MLX4_DEV_CAP_FLAG2_IGNORE_FCS = 1LL << 28,
+ MLX4_DEV_CAP_FLAG2_PHV_EN = 1LL << 29,
+ MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN = 1LL << 30,
+ MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB = 1ULL << 31,
+ MLX4_DEV_CAP_FLAG2_LB_SRC_CHK = 1ULL << 32,
+ MLX4_DEV_CAP_FLAG2_ROCE_V1_V2 = 1ULL << 33,
+ MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER = 1ULL << 34,
+ MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT = 1ULL << 35,
+ MLX4_DEV_CAP_FLAG2_SVLAN_BY_QP = 1ULL << 36,
+ MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT = 1ULL << 37,
};
+enum {
+ MLX4_QUERY_FUNC_FLAGS_BF_RES_QP = 1LL << 0,
+ MLX4_QUERY_FUNC_FLAGS_A0_RES_QP = 1LL << 1
+};
+
+enum {
+ MLX4_VF_CAP_FLAG_RESET = 1 << 0
+};
+
/* bit enums for an 8-bit flags field indicating special use
* QPs which require special handling in qp_reserve_range.
* Currently, this only includes QPs used by the ETH interface,
@@ -210,38 +248,47 @@ enum {
* This enum may use only bits 0..7.
*/
enum {
- MLX4_RESERVE_BF_QP = 1 << 7,
+ MLX4_RESERVE_A0_QP = 1 << 6,
+ MLX4_RESERVE_ETH_BF_QP = 1 << 7,
};
enum {
- MLX4_DEV_CAP_CQ_FLAG_IO = 1 << 0
-};
-
-enum {
MLX4_DEV_CAP_64B_EQE_ENABLED = 1LL << 0,
- MLX4_DEV_CAP_64B_CQE_ENABLED = 1LL << 1
+ MLX4_DEV_CAP_64B_CQE_ENABLED = 1LL << 1,
+ MLX4_DEV_CAP_CQE_STRIDE_ENABLED = 1LL << 2,
+ MLX4_DEV_CAP_EQE_STRIDE_ENABLED = 1LL << 3
};
enum {
- MLX4_USER_DEV_CAP_64B_CQE = 1L << 0
+ MLX4_USER_DEV_CAP_LARGE_CQE = 1L << 0
};
enum {
- MLX4_FUNC_CAP_64B_EQE_CQE = 1L << 0
+ MLX4_FUNC_CAP_64B_EQE_CQE = 1L << 0,
+ MLX4_FUNC_CAP_EQE_CQE_STRIDE = 1L << 1,
+ MLX4_FUNC_CAP_DMFS_A0_STATIC = 1L << 2
};
#define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90)
enum {
- MLX4_BMME_FLAG_WIN_TYPE_2B = 1 << 1,
+ MLX4_BMME_FLAG_WIN_TYPE_2B = 1 << 1,
MLX4_BMME_FLAG_LOCAL_INV = 1 << 6,
MLX4_BMME_FLAG_REMOTE_INV = 1 << 7,
MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9,
MLX4_BMME_FLAG_RESERVED_LKEY = 1 << 10,
MLX4_BMME_FLAG_FAST_REG_WR = 1 << 11,
+ MLX4_BMME_FLAG_ROCE_V1_V2 = 1 << 19,
+ MLX4_BMME_FLAG_PORT_REMAP = 1 << 24,
+ MLX4_BMME_FLAG_VSD_INIT2RTR = 1 << 28,
};
+enum {
+ MLX4_FLAG_PORT_REMAP = MLX4_BMME_FLAG_PORT_REMAP,
+ MLX4_FLAG_ROCE_V1_V2 = MLX4_BMME_FLAG_ROCE_V1_V2
+};
+
enum mlx4_event {
MLX4_EVENT_TYPE_COMP = 0x00,
MLX4_EVENT_TYPE_PATH_MIG = 0x01,
@@ -311,6 +358,7 @@ enum {
MLX4_PERM_REMOTE_WRITE = 1 << 13,
MLX4_PERM_ATOMIC = 1 << 14,
MLX4_PERM_BIND_MW = 1 << 15,
+ MLX4_PERM_MASK = 0xFC00
};
enum {
@@ -355,12 +403,10 @@ enum {
MLX4_MTT_FLAG_PRESENT = 1
};
-enum {
- MLX4_MAX_MTT_SHIFT = 31
-};
-
enum mlx4_qp_region {
MLX4_QP_REGION_FW = 0,
+ MLX4_QP_REGION_RSS_RAW_ETH,
+ MLX4_QP_REGION_BOTTOM = MLX4_QP_REGION_RSS_RAW_ETH,
MLX4_QP_REGION_ETH_ADDR,
MLX4_QP_REGION_FC_ADDR,
MLX4_QP_REGION_FC_EXCH,
@@ -371,8 +417,7 @@ enum mlx4_port_type {
MLX4_PORT_TYPE_NONE = 0,
MLX4_PORT_TYPE_IB = 1,
MLX4_PORT_TYPE_ETH = 2,
- MLX4_PORT_TYPE_AUTO = 3,
- MLX4_PORT_TYPE_NA = 4
+ MLX4_PORT_TYPE_AUTO = 3
};
enum mlx4_special_vlan_idx {
@@ -396,9 +441,21 @@ enum {
};
enum {
+ /*
+ * Max wqe size for rdma read is 512 bytes, so this
+ * limits our max_sge_rd as the wqe needs to fit:
+ * - ctrl segment (16 bytes)
+ * - rdma segment (16 bytes)
+ * - scatter elements (16 bytes each)
+ */
+ MLX4_MAX_SGE_RD = (512 - 16 - 16) / 16
+};
+
+enum {
MLX4_DEV_PMC_SUBTYPE_GUID_INFO = 0x14,
MLX4_DEV_PMC_SUBTYPE_PORT_INFO = 0x15,
MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE = 0x16,
+ MLX4_DEV_PMC_SUBTYPE_SL_TO_VL_MAP = 0x17,
};
/* Port mgmt change event handling */
@@ -410,16 +467,46 @@ enum {
MLX4_EQ_PORT_INFO_MSTR_SM_SL_CHANGE_MASK = 1 << 4,
};
+union sl2vl_tbl_to_u64 {
+ u8 sl8[8];
+ u64 sl64;
+};
+
+enum {
+ MLX4_DEVICE_STATE_UP = 1 << 0,
+ MLX4_DEVICE_STATE_INTERNAL_ERROR = 1 << 1,
+};
+
+enum {
+ MLX4_INTERFACE_STATE_UP = 1 << 0,
+ MLX4_INTERFACE_STATE_DELETION = 1 << 1,
+};
+
#define MSTR_SM_CHANGE_MASK (MLX4_EQ_PORT_INFO_MSTR_SM_SL_CHANGE_MASK | \
MLX4_EQ_PORT_INFO_MSTR_SM_LID_CHANGE_MASK)
enum mlx4_module_id {
- MLX4_MODULE_ID_SFP = 0x3,
- MLX4_MODULE_ID_QSFP = 0xC,
- MLX4_MODULE_ID_QSFP_PLUS = 0xD,
- MLX4_MODULE_ID_QSFP28 = 0x11,
+ MLX4_MODULE_ID_SFP = 0x3,
+ MLX4_MODULE_ID_QSFP = 0xC,
+ MLX4_MODULE_ID_QSFP_PLUS = 0xD,
+ MLX4_MODULE_ID_QSFP28 = 0x11,
};
+enum { /* rl */
+ MLX4_QP_RATE_LIMIT_NONE = 0,
+ MLX4_QP_RATE_LIMIT_KBS = 1,
+ MLX4_QP_RATE_LIMIT_MBS = 2,
+ MLX4_QP_RATE_LIMIT_GBS = 3
+};
+
+struct mlx4_rate_limit_caps {
+ u16 num_rates; /* Number of different rates */
+ u8 min_unit;
+ u16 min_val;
+ u8 max_unit;
+ u16 max_val;
+};
+
static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
{
return (major << 32) | (minor << 16) | subminor;
@@ -462,6 +549,8 @@ struct mlx4_caps {
int max_rq_desc_sz;
int max_qp_init_rdma;
int max_qp_dest_rdma;
+ int max_tc_eth;
+ u32 *qp0_qkey;
u32 *qp0_proxy;
u32 *qp1_proxy;
u32 *qp0_tunnel;
@@ -473,13 +562,13 @@ struct mlx4_caps {
int num_cqs;
int max_cqes;
int reserved_cqs;
+ int num_sys_eqs;
int num_eqs;
int reserved_eqs;
int num_comp_vectors;
- int comp_pool;
int num_mpts;
int max_fmr_maps;
- u64 num_mtts;
+ int num_mtts;
int fmr_reserved_mtts;
int reserved_mtts;
int reserved_mrws;
@@ -489,6 +578,8 @@ struct mlx4_caps {
int reserved_mcgs;
int num_qp_per_mgm;
int steering_mode;
+ int dmfs_high_steer_mode;
+ int fs_log_max_ucast_qp_range_size;
int num_pds;
int reserved_pds;
int max_xrcds;
@@ -501,7 +592,6 @@ struct mlx4_caps {
u32 bmme_flags;
u32 reserved_lkey;
u16 stat_rate_support;
- u8 cq_timestamp;
u8 port_width_cap[MLX4_MAX_PORTS + 1];
int max_gso_sz;
int max_rss_tbl_sz;
@@ -519,18 +609,21 @@ struct mlx4_caps {
u32 max_counters;
u8 port_ib_mtu[MLX4_MAX_PORTS + 1];
u16 sqp_demux;
- u32 sync_qp;
- u32 cq_flags;
u32 eqe_size;
u32 cqe_size;
u8 eqe_factor;
- u32 userspace_caps; /* userspace must be aware to */
- u32 function_caps; /* functions must be aware to */
- u8 fast_drop;
+ u32 userspace_caps; /* userspace must be aware of these */
+ u32 function_caps; /* VFs must be aware of these */
u16 hca_core_clock;
- u32 max_basic_counters;
- u32 max_extended_counters;
- u8 def_counter_index[MLX4_MAX_PORTS + 1];
+ u64 phys_port_id[MLX4_MAX_PORTS + 1];
+ int tunnel_offload_mode;
+ u8 rx_checksum_flags_port[MLX4_MAX_PORTS + 1];
+ u8 phv_bit[MLX4_MAX_PORTS + 1];
+ u8 alloc_res_qp_mask;
+ u32 dmfs_high_rate_qpn_base;
+ u32 dmfs_high_rate_qpn_range;
+ u32 vf_caps;
+ struct mlx4_rate_limit_caps rl_caps;
};
struct mlx4_buf_list {
@@ -627,7 +720,7 @@ struct mlx4_uar {
};
struct mlx4_bf {
- unsigned long offset;
+ unsigned int offset;
int buf_size;
struct mlx4_uar *uar;
void __iomem *reg;
@@ -641,6 +734,7 @@ struct mlx4_cq {
u32 cons_index;
+ u16 irq;
__be32 *set_ci_db;
__be32 *arm_db;
int arm_sn;
@@ -650,8 +744,8 @@ struct mlx4_cq {
atomic_t refcount;
struct completion free;
- int eqn;
- u16 irq;
+ int reset_notify_added;
+ struct list_head reset_notify;
};
struct mlx4_qp {
@@ -700,9 +794,9 @@ struct mlx4_eth_av {
__be32 sl_tclass_flowlabel;
u8 dgid[16];
u8 s_mac[6];
- u8 reserved4[2];
+ u8 reserved4[2];
__be16 vlan;
- u8 mac[6];
+ u8 mac[ETH_ALEN];
};
union mlx4_ext_av {
@@ -710,66 +804,17 @@ union mlx4_ext_av {
struct mlx4_eth_av eth;
};
-struct mlx4_if_stat_control {
- u8 reserved1[3];
- /* Extended counters enabled */
- u8 cnt_mode;
- /* Number of interfaces */
- __be32 num_of_if;
- __be32 reserved[2];
+struct mlx4_counter {
+ u8 reserved1[3];
+ u8 counter_mode;
+ __be32 num_ifc;
+ u32 reserved2[2];
+ __be64 rx_frames;
+ __be64 rx_bytes;
+ __be64 tx_frames;
+ __be64 tx_bytes;
};
-struct mlx4_if_stat_basic {
- struct mlx4_if_stat_control control;
- struct {
- __be64 IfRxFrames;
- __be64 IfRxOctets;
- __be64 IfTxFrames;
- __be64 IfTxOctets;
- } counters[];
-};
-#define MLX4_IF_STAT_BSC_SZ(ports)(sizeof(struct mlx4_if_stat_extended) +\
- sizeof(((struct mlx4_if_stat_extended *)0)->\
- counters[0]) * ports)
-
-struct mlx4_if_stat_extended {
- struct mlx4_if_stat_control control;
- struct {
- __be64 IfRxUnicastFrames;
- __be64 IfRxUnicastOctets;
- __be64 IfRxMulticastFrames;
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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