svn commit: r333100 - head/sys/dev/usb/controller
Hans Petter Selasky
hselasky at FreeBSD.org
Mon Apr 30 07:30:38 UTC 2018
Author: hselasky
Date: Mon Apr 30 07:30:37 2018
New Revision: 333100
URL: https://svnweb.freebsd.org/changeset/base/333100
Log:
Improve fix in r304629 by allowing configuration of the behaviour
through a SYSCTL instead of a compile time define.
Add quirk by default for all LynxPoint XHCI controllers.
PR: 227602
MFC after: 3 days
Sponsored by: Mellanox Technologies
Modified:
head/sys/dev/usb/controller/xhci.c
head/sys/dev/usb/controller/xhci.h
head/sys/dev/usb/controller/xhci_pci.c
Modified: head/sys/dev/usb/controller/xhci.c
==============================================================================
--- head/sys/dev/usb/controller/xhci.c Mon Apr 30 07:24:31 2018 (r333099)
+++ head/sys/dev/usb/controller/xhci.c Mon Apr 30 07:30:37 2018 (r333100)
@@ -100,6 +100,7 @@ static int xhcidebug;
static int xhciroute;
static int xhcipolling;
static int xhcidma32;
+static int xhcictlstep;
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, debug, CTLFLAG_RWTUN,
&xhcidebug, 0, "Debug level");
@@ -109,9 +110,12 @@ SYSCTL_INT(_hw_usb_xhci, OID_AUTO, use_polling, CTLFLA
&xhcipolling, 0, "Set to enable software interrupt polling for the XHCI controller");
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, dma32, CTLFLAG_RWTUN,
&xhcidma32, 0, "Set to only use 32-bit DMA for the XHCI controller");
+SYSCTL_INT(_hw_usb_xhci, OID_AUTO, ctlstep, CTLFLAG_RWTUN,
+ &xhcictlstep, 0, "Set to enable control endpoint status stage stepping");
#else
#define xhciroute 0
#define xhcidma32 0
+#define xhcictlstep 0
#endif
#define XHCI_INTR_ENDPT 1
@@ -2240,11 +2244,17 @@ xhci_setup_generic_chain(struct usb_xfer *xfer)
* Send a DATA1 message and invert the current
* endpoint direction.
*/
-#ifdef XHCI_STEP_STATUS_STAGE
- temp.step_td = (xfer->nframes != 0);
-#else
- temp.step_td = 0;
-#endif
+ if (xhcictlstep || temp.sc->sc_ctlstep) {
+ /*
+ * Some XHCI controllers will not delay the
+ * status stage until the next SOF. Force this
+ * behaviour to avoid failed control
+ * transfers.
+ */
+ temp.step_td = (xfer->nframes != 0);
+ } else {
+ temp.step_td = 0;
+ }
temp.direction = UE_GET_DIR(xfer->endpointno) ^ UE_DIR_IN;
temp.len = 0;
temp.pc = NULL;
Modified: head/sys/dev/usb/controller/xhci.h
==============================================================================
--- head/sys/dev/usb/controller/xhci.h Mon Apr 30 07:24:31 2018 (r333099)
+++ head/sys/dev/usb/controller/xhci.h Mon Apr 30 07:30:37 2018 (r333100)
@@ -509,6 +509,8 @@ struct xhci_softc {
uint8_t sc_noport;
/* root HUB device configuration */
uint8_t sc_conf;
+ /* step status stage of all control transfers */
+ uint8_t sc_ctlstep;
/* root HUB port event bitmap, max 256 ports */
uint8_t sc_hub_idata[32];
Modified: head/sys/dev/usb/controller/xhci_pci.c
==============================================================================
--- head/sys/dev/usb/controller/xhci_pci.c Mon Apr 30 07:24:31 2018 (r333099)
+++ head/sys/dev/usb/controller/xhci_pci.c Mon Apr 30 07:30:37 2018 (r333100)
@@ -256,6 +256,7 @@ xhci_pci_attach(device_t self)
*/
sc->sc_port_route = &xhci_pci_port_route;
sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
+ sc->sc_ctlstep = 1;
break;
}
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