svn commit: r325583 - head/sys/dev/ena
Marcin Wojtas
mw at FreeBSD.org
Thu Nov 9 12:03:08 UTC 2017
Author: mw
Date: Thu Nov 9 12:03:06 2017
New Revision: 325583
URL: https://svnweb.freebsd.org/changeset/base/325583
Log:
Allow partial MSI-x allocation in ENA driver
The situation, where part of the MSI-x was not configured properly, was
not properly handled. Now, the driver reduces number of queues to
reflect number of existing and properly configured MSI-x vectors.
Submitted by: Michal Krawczyk <mk at semihalf.com>
Reviewed by: byenduri_gmail.com
Obtained from: Semihalf
Sponsored by: Amazon, Inc.
Differential Revision: https://reviews.freebsd.org/D12863
Modified:
head/sys/dev/ena/ena.c
head/sys/dev/ena/ena.h
Modified: head/sys/dev/ena/ena.c
==============================================================================
--- head/sys/dev/ena/ena.c Thu Nov 9 12:01:46 2017 (r325582)
+++ head/sys/dev/ena/ena.c Thu Nov 9 12:03:06 2017 (r325583)
@@ -1796,7 +1796,8 @@ static int
ena_enable_msix(struct ena_adapter *adapter)
{
device_t dev = adapter->pdev;
- int i, msix_vecs, rc = 0;
+ int msix_vecs, msix_req;
+ int i, rc = 0;
/* Reserved the max msix vectors we might need */
msix_vecs = ENA_MAX_MSIX_VEC(adapter->num_queues);
@@ -1813,6 +1814,7 @@ ena_enable_msix(struct ena_adapter *adapter)
adapter->msix_entries[i].vector = i + 1;
}
+ msix_req = msix_vecs;
rc = pci_alloc_msix(dev, &msix_vecs);
if (unlikely(rc != 0)) {
device_printf(dev,
@@ -1820,6 +1822,12 @@ ena_enable_msix(struct ena_adapter *adapter)
rc = ENOSPC;
goto err_msix_free;
+ }
+
+ if (msix_vecs != msix_req) {
+ device_printf(dev, "Enable only %d MSI-x (out of %d), reduce "
+ "the number of queues\n", msix_vecs, msix_req);
+ adapter->num_queues = msix_vecs - ENA_ADMIN_MSIX_VEC;
}
adapter->msix_vecs = msix_vecs;
Modified: head/sys/dev/ena/ena.h
==============================================================================
--- head/sys/dev/ena/ena.h Thu Nov 9 12:01:46 2017 (r325582)
+++ head/sys/dev/ena/ena.h Thu Nov 9 12:03:06 2017 (r325583)
@@ -58,7 +58,8 @@
#define ENA_DMA_BIT_MASK(x) ((1ULL << (x)) - 1ULL)
/* 1 for AENQ + ADMIN */
-#define ENA_MAX_MSIX_VEC(io_queues) (1 + (io_queues))
+#define ENA_ADMIN_MSIX_VEC 1
+#define ENA_MAX_MSIX_VEC(io_queues) (ENA_ADMIN_MSIX_VEC + (io_queues))
#define ENA_REG_BAR 0
#define ENA_MEM_BAR 2
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