svn commit: r317708 - head/share/man/man7

[Justin Hibbits]

Author: jhibbits
Date: Tue May  2 21:33:27 2017
New Revision: 317708
URL: https://svnweb.freebsd.org/changeset/base/317708

Log:
  Add powerpcspe to arch(7)
  
  Reviewed by:	emaste

Modified:
  head/share/man/man7/arch.7

Modified: head/share/man/man7/arch.7
==============================================================================
--- head/share/man/man7/arch.7	Tue May  2 21:20:27 2017	(r317707)
+++ head/share/man/man7/arch.7	Tue May  2 21:33:27 2017	(r317708)
@@ -65,6 +65,7 @@ On all supported architectures,
 .It mips64elhf  Ta 8 Ta  8 Ta 8
 .It mips64hf    Ta 8 Ta  8 Ta 8
 .It powerpc     Ta 4 Ta  8 Ta 4
+.It powerpcspe  Ta 4 Ta  8 Ta 4
 .It powerpc64   Ta 8 Ta  8 Ta 8
 .It riscv       Ta 8 Ta 16 Ta 8
 .It sparc64     Ta 8 Ta 16 Ta 8
@@ -88,6 +89,7 @@ On all supported architectures,
 .It mips64elhf  Ta little Ta   signed
 .It mips64hf    Ta big    Ta   signed
 .It powerpc     Ta big    Ta unsigned
+.It powerpcspe  Ta big    Ta unsigned
 .It powerpc64   Ta big    Ta unsigned
 .It riscv       Ta little Ta   signed
 .It sparc64     Ta big    Ta   signed
@@ -111,6 +113,7 @@ On all supported architectures,
 .It mips64elhf  Ta 4K
 .It mips64hf    Ta 4K
 .It powerpc     Ta 4K
+.It powerpcspe  Ta 4K
 .It powerpc64   Ta 4K
 .It riscv       Ta 4K
 .It sparc64     Ta 8K
@@ -134,6 +137,7 @@ On all supported architectures,
 .It mips64elhf  Ta hard Ta identical to double
 .It mips64hf    Ta hard Ta identical to double
 .It powerpc     Ta hard Ta hard, double precision
+.It powerpcspe  Ta hard Ta hard, double precision
 .It powerpc64   Ta hard Ta hard, double precision
 .It riscv64     Ta hard Ta hard, double precision
 .It riscv64sf   Ta soft Ta soft, double precision
@@ -180,6 +184,7 @@ Architecture-specific macros:
 .It mips64elhf  Ta Dv __mips__, Dv __mips_n64
 .It mips64hf    Ta Dv __mips__, Dv __MIPSEB__, Dv __mips_n64
 .It powerpc     Ta Dv __powerpc__
+.It powerpcspe  Ta Dv __powerpc__, Dv __SPE__
 .It powerpc64   Ta Dv __powerpc__, Dv __powerpc64__
 .It riscv       Ta Dv __riscv__, Dv __riscv64
 .It sparc64     Ta Dv __sparc64__