svn commit: r315431 - head/sys/dev/sdhci

[Marius Strobl]

Author: marius
Date: Thu Mar 16 22:42:17 2017
New Revision: 315431
URL: https://svnweb.freebsd.org/changeset/base/315431

Log:
  - Adds macros for the content of SDHCI_ADMA_ERR and SDHCI_HOST_CONTROL2
    registers.
  - Add slot type capability bits. These bits should allow recognizing
    removable card slots, embedded cards and shared buses (shared bus
    supposedly is always comprised of non-removable cards).
  - Dump CAPABILITIES2, ADMA_ERR, HOST_CONTROL2 and ADMA_ADDRESS_LO
    registers in sdhci_dumpregs().
  - The drive type support flags in the CAPABILITIES2 register are for
    drive types A,C,D, drive type B is the default setting (value 0) of
    the drive strength field in the SDHCI_HOST_CONTROL2 register.
  
  Obtained from:	DragonFlyBSD (9e3c8f63, 455bd1b1)

Modified:
  head/sys/dev/sdhci/sdhci.c
  head/sys/dev/sdhci/sdhci.h

Modified: head/sys/dev/sdhci/sdhci.c
==============================================================================
--- head/sys/dev/sdhci/sdhci.c	Thu Mar 16 22:23:04 2017	(r315430)
+++ head/sys/dev/sdhci/sdhci.c	Thu Mar 16 22:42:17 2017	(r315431)
@@ -157,10 +157,14 @@ sdhci_dumpregs(struct sdhci_slot *slot)
 	    RD1(slot, SDHCI_TIMEOUT_CONTROL), RD4(slot, SDHCI_INT_STATUS));
 	slot_printf(slot, "Int enab: 0x%08x | Sig enab: 0x%08x\n",
 	    RD4(slot, SDHCI_INT_ENABLE), RD4(slot, SDHCI_SIGNAL_ENABLE));
-	slot_printf(slot, "AC12 err: 0x%08x | Slot int: 0x%08x\n",
-	    RD2(slot, SDHCI_ACMD12_ERR), RD2(slot, SDHCI_SLOT_INT_STATUS));
-	slot_printf(slot, "Caps:     0x%08x | Max curr: 0x%08x\n",
-	    RD4(slot, SDHCI_CAPABILITIES), RD4(slot, SDHCI_MAX_CURRENT));
+	slot_printf(slot, "AC12 err: 0x%08x | Host ctl2: 0x%08x\n",
+	    RD2(slot, SDHCI_ACMD12_ERR), RD2(slot, SDHCI_HOST_CONTROL2));
+	slot_printf(slot, "Caps:     0x%08x | Caps2:    0x%08x\n",
+	    RD4(slot, SDHCI_CAPABILITIES), RD4(slot, SDHCI_CAPABILITIES2));
+	slot_printf(slot, "Max curr: 0x%08x | ADMA err: 0x%08x\n",
+	    RD4(slot, SDHCI_MAX_CURRENT), RD1(slot, SDHCI_ADMA_ERR));
+	slot_printf(slot, "ADMA addr: 0x%08x | Slot int: 0x%08x\n",
+	    RD4(slot, SDHCI_ADMA_ADDRESS_LO), RD2(slot, SDHCI_SLOT_INT_STATUS));
 
 	slot_printf(slot,
 	    "===========================================\n");

Modified: head/sys/dev/sdhci/sdhci.h
==============================================================================
--- head/sys/dev/sdhci/sdhci.h	Thu Mar 16 22:23:04 2017	(r315430)
+++ head/sys/dev/sdhci/sdhci.h	Thu Mar 16 22:42:17 2017	(r315431)
@@ -219,7 +219,24 @@
 		SDHCI_INT_DATA_END_BIT)
 
 #define	SDHCI_ACMD12_ERR	0x3C
+
 #define	SDHCI_HOST_CONTROL2	0x3E
+#define	 SDHCI_CTRL2_PRESET_VALUE	0x8000
+#define	 SDHCI_CTRL2_ASYNC_INTR	0x4000
+#define	 SDHCI_CTRL2_SAMPLING_CLOCK	0x0080
+#define	 SDHCI_CTRL2_EXEC_TUNING	0x0040
+#define	 SDHCI_CTRL2_DRIVER_TYPE_MASK	0x0030
+#define	 SDHCI_CTRL2_DRIVER_TYPE_B	0x0000
+#define	 SDHCI_CTRL2_DRIVER_TYPE_A	0x0010
+#define	 SDHCI_CTRL2_DRIVER_TYPE_C	0x0020
+#define	 SDHCI_CTRL2_DRIVER_TYPE_D	0x0030
+#define	 SDHCI_CTRL2_S18_ENABLE	0x0008
+#define	 SDHCI_CTRL2_UHS_MASK	0x0007
+#define	 SDHCI_CTRL2_UHS_SDR12	0x0000
+#define	 SDHCI_CTRL2_UHS_SDR25	0x0001
+#define	 SDHCI_CTRL2_UHS_SDR50	0x0002
+#define	 SDHCI_CTRL2_UHS_SDR104	0x0003
+#define	 SDHCI_CTRL2_UHS_DDR50	0x0004
 
 #define	SDHCI_CAPABILITIES	0x40
 #define	 SDHCI_TIMEOUT_CLK_MASK	0x0000003F
@@ -240,14 +257,18 @@
 #define	 SDHCI_CAN_VDD_180	0x04000000
 #define	 SDHCI_CAN_DO_64BIT	0x10000000
 #define	 SDHCI_CAN_ASYNC_INTR	0x20000000
+#define	 SDHCI_SLOTTYPE_MASK	0xC0000000
+#define	 SDHCI_SLOTTYPE_REMOVABLE	0x00000000
+#define	 SDHCI_SLOTTYPE_EMBEDDED	0x40000000
+#define	 SDHCI_SLOTTYPE_SHARED	0x80000000
 
 #define	SDHCI_CAPABILITIES2	0x44
 #define	 SDHCI_CAN_SDR50	0x00000001
 #define	 SDHCI_CAN_SDR104	0x00000002
 #define	 SDHCI_CAN_DDR50	0x00000004
 #define	 SDHCI_CAN_DRIVE_TYPE_A	0x00000010
-#define	 SDHCI_CAN_DRIVE_TYPE_B	0x00000020
-#define	 SDHCI_CAN_DRIVE_TYPE_C	0x00000040
+#define	 SDHCI_CAN_DRIVE_TYPE_C	0x00000020
+#define	 SDHCI_CAN_DRIVE_TYPE_D	0x00000040
 #define	 SDHCI_RETUNE_CNT_MASK	0x00000F00
 #define	 SDHCI_RETUNE_CNT_SHIFT	8
 #define	 SDHCI_TUNE_SDR50	0x00002000
@@ -259,9 +280,17 @@
 #define	SDHCI_MAX_CURRENT	0x48
 #define	SDHCI_FORCE_AUTO_EVENT	0x50
 #define	SDHCI_FORCE_INTR_EVENT	0x52
+
 #define	SDHCI_ADMA_ERR		0x54
-#define	SDHCI_ADMA_ADDRESS_LOW	0x58
+#define	 SDHCI_ADMA_ERR_LENGTH	0x04
+#define	 SDHCI_ADMA_ERR_STATE_MASK	0x03
+#define	 SDHCI_ADMA_ERR_STATE_STOP	0x00
+#define	 SDHCI_ADMA_ERR_STATE_FDS	0x01
+#define	 SDHCI_ADMA_ERR_STATE_TFR	0x03
+
+#define	SDHCI_ADMA_ADDRESS_LO	0x58
 #define	SDHCI_ADMA_ADDRESS_HI	0x5C
+
 #define	SDHCI_PRESET_VALUE	0x60
 #define	SDHCI_SHARED_BUS_CTRL	0xE0
 
@@ -275,6 +304,7 @@
 #define	SDHCI_SPEC_100		0
 #define	SDHCI_SPEC_200		1
 #define	SDHCI_SPEC_300		2
+#define	SDHCI_SPEC_400		3
 
 SYSCTL_DECL(_hw_sdhci);