svn commit: r326537 - head/sys/amd64/vmm/amd

[Andriy Gapon]

Author: avg
Date: Mon Dec  4 17:02:53 2017
New Revision: 326537
URL: https://svnweb.freebsd.org/changeset/base/326537

Log:
  amd-vi: clear event interrupt and overflow bits upon handling the interrupt
  
  This ensures that we can receive further event interrupts.
  See the description of the bits in the specification for
  MMIO Offset 2020h IOMMU Status Register.
  The bits are defined as set-by-hardware write-1-to-clear, same as all
  the bits in the status register.
  
  Discussed with:	anish

Modified:
  head/sys/amd64/vmm/amd/amdvi_hw.c

Modified: head/sys/amd64/vmm/amd/amdvi_hw.c
==============================================================================
--- head/sys/amd64/vmm/amd/amdvi_hw.c	Mon Dec  4 16:47:19 2017	(r326536)
+++ head/sys/amd64/vmm/amd/amdvi_hw.c	Mon Dec  4 17:02:53 2017	(r326537)
@@ -815,6 +815,7 @@ amdvi_event_intr(void *arg)
 	    softc->total_cmd, ctrl->cmd_tail, ctrl->cmd_head);
 
 	amdvi_print_events(softc);
+	ctrl->status &= AMDVI_STATUS_EV_OF | AMDVI_STATUS_EV_INTR;
 }
 
 static void
@@ -839,6 +840,7 @@ amdvi_free_evt_intr_res(device_t dev)
 static	bool
 amdvi_alloc_intr_resources(struct amdvi_softc *softc)
 {
+	struct amdvi_ctrl *ctrl;
 	device_t dev, pcib;
 	uint64_t msi_addr;
 	uint32_t msi_data, temp;
@@ -902,6 +904,10 @@ amdvi_alloc_intr_resources(struct amdvi_softc *softc)
 		amdvi_free_evt_intr_res(softc->dev);
 		return (err);
 	}
+
+	/* Clear interrupt status bits. */
+	ctrl = softc->ctrl;
+	ctrl->status &= AMDVI_STATUS_EV_OF | AMDVI_STATUS_EV_INTR;
 
 	/* Configure MSI */
 	amdvi_pci_write(softc, msi_off + PCIR_MSI_ADDR, msi_addr);