svn commit: r306503 - head/sys/arm/include

[Andrew Turner]

Author: andrew
Date: Fri Sep 30 14:00:23 2016
New Revision: 306503
URL: https://svnweb.freebsd.org/changeset/base/306503

Log:
  Revert an accedintal commit.

Modified:
  head/sys/arm/include/cpu-v6.h

Modified: head/sys/arm/include/cpu-v6.h
==============================================================================
--- head/sys/arm/include/cpu-v6.h	Fri Sep 30 13:50:59 2016	(r306502)
+++ head/sys/arm/include/cpu-v6.h	Fri Sep 30 14:00:23 2016	(r306503)
@@ -345,18 +345,12 @@ tlb_flush_range_local(vm_offset_t va, vm
 /* Broadcasting operations. */
 #if __ARM_ARCH >= 7 && defined SMP
 
-/* Used to detect SMP */
-extern int mp_ncpus;
-
 static __inline void
 tlb_flush_all(void)
 {
 
 	dsb();
-	if (mp_ncpus == 1)
-		_CP15_TLBIALL();
-	else
-		_CP15_TLBIALLIS();
+	_CP15_TLBIALLIS();
 	dsb();
 }
 
@@ -365,10 +359,7 @@ tlb_flush_all_ng(void)
 {
 
 	dsb();
-	if (mp_ncpus == 1)
-		_CP15_TLBIASID(CPU_ASID_KERNEL);
-	else
-		_CP15_TLBIASIDIS(CPU_ASID_KERNEL);
+	_CP15_TLBIASIDIS(CPU_ASID_KERNEL);
 	dsb();
 }
 
@@ -379,10 +370,7 @@ tlb_flush(vm_offset_t va)
 	KASSERT((va & PAGE_MASK) == 0, ("%s: va %#x not aligned", __func__, va));
 
 	dsb();
-	if (mp_ncpus == 1)
-		_CP15_TLBIMVA(va | CPU_ASID_KERNEL);
-	else
-		_CP15_TLBIMVAAIS(va);
+	_CP15_TLBIMVAAIS(va);
 	dsb();
 }
 
@@ -396,13 +384,8 @@ tlb_flush_range(vm_offset_t va,  vm_size
 	    size));
 
 	dsb();
-	if (mp_ncpus == 1) {
-		for (; va < eva; va += PAGE_SIZE)
-			_CP15_TLBIMVA(va | CPU_ASID_KERNEL);
-	} else {
-		for (; va < eva; va += PAGE_SIZE)
-			_CP15_TLBIMVAAIS(va);
-	}
+	for (; va < eva; va += PAGE_SIZE)
+		_CP15_TLBIMVAAIS(va);
 	dsb();
 }
 #else /* SMP */
@@ -428,19 +411,17 @@ icache_sync(vm_offset_t va, vm_size_t si
 	va &= ~cpuinfo.dcache_line_mask;
 	for ( ; va < eva; va += cpuinfo.dcache_line_size) {
 #if __ARM_ARCH >= 7 && defined SMP
-		if (mp_ncpus > 1)
-			_CP15_DCCMVAU(va);
-		else
+		_CP15_DCCMVAU(va);
+#else
+		_CP15_DCCMVAC(va);
 #endif
-			_CP15_DCCMVAC(va);
 	}
 	dsb();
 #if __ARM_ARCH >= 7 && defined SMP
-	if (mp_ncpus > 1)
-		_CP15_ICIALLUIS();
-	else
+	_CP15_ICIALLUIS();
+#else
+	_CP15_ICIALLU();
 #endif
-		_CP15_ICIALLU();
 	dsb();
 	isb();
 }
@@ -450,11 +431,10 @@ static __inline void
 icache_inv_all(void)
 {
 #if __ARM_ARCH >= 7 && defined SMP
-	if (mp_ncpus > 1)
-		_CP15_ICIALLUIS();
-	else
+	_CP15_ICIALLUIS();
+#else
+	_CP15_ICIALLU();
 #endif
-		_CP15_ICIALLU();
 	dsb();
 	isb();
 }
@@ -464,11 +444,10 @@ static __inline void
 bpb_inv_all(void)
 {
 #if __ARM_ARCH >= 7 && defined SMP
-	if (mp_ncpus > 1)
-		_CP15_BPIALLIS();
-	else
+	_CP15_BPIALLIS();
+#else
+	_CP15_BPIALL();
 #endif
-		_CP15_BPIALL();
 	dsb();
 	isb();
 }
@@ -483,11 +462,10 @@ dcache_wb_pou(vm_offset_t va, vm_size_t 
 	va &= ~cpuinfo.dcache_line_mask;
 	for ( ; va < eva; va += cpuinfo.dcache_line_size) {
 #if __ARM_ARCH >= 7 && defined SMP
-		if (mp_ncpus > 1)
-			_CP15_DCCMVAU(va);
-		else
+		_CP15_DCCMVAU(va);
+#else
+		_CP15_DCCMVAC(va);
 #endif
-			_CP15_DCCMVAC(va);
 	}
 	dsb();
 }