svn commit: r300050 - in head: share/doc/usd/07.mail share/man/man9 sys/amd64/vmm/io sys/arm/allwinner sys/arm/freescale/imx sys/arm/include sys/cam sys/dev/bhnd sys/dev/bxe sys/dev/drm2/i915 sys/d...

Eitan Adler eadler at FreeBSD.org
Tue May 17 12:52:36 UTC 2016 

Author: eadler
Date: Tue May 17 12:52:31 2016
New Revision: 300050
URL: https://svnweb.freebsd.org/changeset/base/300050

Log:
  Don't repeat the the word 'the'
  
  (one manual change to fix grammar)
  
  Confirmed With: db
  Approved by: secteam (not really, but this is a comment typo fix)

Modified:
  head/share/doc/usd/07.mail/mail6.nr
  head/share/man/man9/BUS_GET_CPUS.9
  head/sys/amd64/vmm/io/vhpet.c
  head/sys/arm/allwinner/a10_ahci.c
  head/sys/arm/freescale/imx/imx_sdhci.c
  head/sys/arm/include/asm.h
  head/sys/cam/cam_periph.c
  head/sys/dev/bhnd/bhnd.c
  head/sys/dev/bxe/ecore_hsi.h
  head/sys/dev/drm2/i915/intel_crt.c
  head/sys/dev/drm2/i915/intel_display.c
  head/sys/dev/drm2/radeon/atombios.h
  head/sys/dev/drm2/radeon/r300_reg.h
  head/sys/dev/drm2/radeon/radeon_device.c
  head/sys/dev/drm2/radeon/radeon_fence.c
  head/sys/dev/drm2/radeon/radeon_gart.c
  head/sys/dev/e1000/e1000_82575.c
  head/sys/dev/e1000/e1000_ich8lan.c
  head/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c
  head/sys/dev/iwm/if_iwmreg.h
  head/sys/dev/netmap/netmap.c
  head/sys/dev/ow/ow.c
  head/sys/dev/pms/RefTisa/sallsdk/spc/mpi.c
  head/sys/dev/pms/RefTisa/sat/src/smsat.c
  head/sys/dev/pms/RefTisa/tisa/sassata/sata/host/sat.c
  head/sys/dev/random/fortuna.c
  head/sys/dev/sfxge/common/ef10_ev.c
  head/sys/mips/conf/DIR-825C1.hints
  head/sys/net/altq/altq_cbq.c
  head/sys/ofed/drivers/infiniband/debug/memtrack.c
  head/sys/ofed/drivers/infiniband/debug/memtrack.h
  head/sys/ofed/drivers/net/mlx4/main.c
  head/sys/xen/interface/io/blkif.h
  head/usr.bin/numactl/numactl.1
  head/usr.sbin/bsdconfig/share/dialog.subr
  head/usr.sbin/pciconf/pciconf.8

Modified: head/share/doc/usd/07.mail/mail6.nr
==============================================================================
--- head/share/doc/usd/07.mail/mail6.nr	Tue May 17 12:48:30 2016	(r300049)
+++ head/share/doc/usd/07.mail/mail6.nr	Tue May 17 12:52:31 2016	(r300050)
@@ -75,7 +75,7 @@ is a shorthand way of doing
 Use the
 .b \-v
 flag when invoking sendmail. This feature may also be enabled
-by setting the the option "verbose".
+by setting the option "verbose".
 .pp
 The following command line flags are also recognized, but are
 intended for use by programs invoking

Modified: head/share/man/man9/BUS_GET_CPUS.9
==============================================================================
--- head/share/man/man9/BUS_GET_CPUS.9	Tue May 17 12:48:30 2016	(r300049)
+++ head/share/man/man9/BUS_GET_CPUS.9	Tue May 17 12:52:31 2016	(r300050)
@@ -62,7 +62,7 @@ argument specifies the size in bytes of 
 .Fa cpuset .
 .Pp
 .Fn BUS_GET_CPUS
-supports querying different types of CPU sets via the the
+supports querying different types of CPU sets via the
 .Fa op argument.
 Not all set types are supported for every device.
 If a set type is not supported,

Modified: head/sys/amd64/vmm/io/vhpet.c
==============================================================================
--- head/sys/amd64/vmm/io/vhpet.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/amd64/vmm/io/vhpet.c	Tue May 17 12:52:31 2016	(r300050)
@@ -163,7 +163,7 @@ vhpet_counter(struct vhpet *vhpet, sbint
 		/*
 		 * The sbinuptime corresponding to the 'countbase' is
 		 * meaningless when the counter is disabled. Make sure
-		 * that the the caller doesn't want to use it.
+		 * that the caller doesn't want to use it.
 		 */
 		KASSERT(nowptr == NULL, ("vhpet_counter: nowptr must be NULL"));
 	}

Modified: head/sys/arm/allwinner/a10_ahci.c
==============================================================================
--- head/sys/arm/allwinner/a10_ahci.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/arm/allwinner/a10_ahci.c	Tue May 17 12:52:31 2016	(r300050)
@@ -158,7 +158,7 @@ ahci_a10_phy_reset(device_t dev)
 	struct ahci_controller *ctlr = device_get_softc(dev);
 
 	/*
-	 * Here start the the magic -- most of the comments are based
+	 * Here starts the magic -- most of the comments are based
 	 * on guesswork, names of routines and printf error
 	 * messages.  The code works, but it will do that even if the
 	 * comments are 100% BS.

Modified: head/sys/arm/freescale/imx/imx_sdhci.c
==============================================================================
--- head/sys/arm/freescale/imx/imx_sdhci.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/arm/freescale/imx/imx_sdhci.c	Tue May 17 12:52:31 2016	(r300050)
@@ -625,7 +625,7 @@ imx_sdhci_intr(void *arg)
 	 * out of the hardware now so that we can present it later when the DAT0
 	 * line is released.
 	 *
-	 * If we need to wait for the the DAT0 line to be released, we set up a
+	 * If we need to wait for the DAT0 line to be released, we set up a
 	 * timeout point 250ms in the future.  This number comes from the SD
 	 * spec, which allows a command to take that long.  In the real world,
 	 * cards tend to take 10-20ms for a long-running command such as a write

Modified: head/sys/arm/include/asm.h
==============================================================================
--- head/sys/arm/include/asm.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/arm/include/asm.h	Tue May 17 12:52:31 2016	(r300050)
@@ -79,7 +79,7 @@
 
 /*
  * EENTRY()/EEND() mark "extra" entry/exit points from a function.
- * LEENTRY()/LEEND() are the the same for local symbols.
+ * LEENTRY()/LEEND() are the same for local symbols.
  * The unwind info cannot handle the concept of a nested function, or a function
  * with multiple .fnstart directives, but some of our assembler code is written
  * with multiple labels to allow entry at several points.  The EENTRY() macro

Modified: head/sys/cam/cam_periph.c
==============================================================================
--- head/sys/cam/cam_periph.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/cam/cam_periph.c	Tue May 17 12:52:31 2016	(r300050)
@@ -844,7 +844,7 @@ cam_periph_mapmem(union ccb *ccb, struct
 	}
 
 	/*
-	 * This keeps the the kernel stack of current thread from getting
+	 * This keeps the kernel stack of current thread from getting
 	 * swapped.  In low-memory situations where the kernel stack might
 	 * otherwise get swapped out, this holds it and allows the thread
 	 * to make progress and release the kernel mapped pages sooner.

Modified: head/sys/dev/bhnd/bhnd.c
==============================================================================
--- head/sys/dev/bhnd/bhnd.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/bhnd/bhnd.c	Tue May 17 12:52:31 2016	(r300050)
@@ -117,7 +117,7 @@ bhnd_generic_attach(device_t dev)
 /**
  * Default bhnd(4) bus driver implementation of DEVICE_DETACH().
  *
- * This implementation calls device_detach() for each of the the device's
+ * This implementation calls device_detach() for each of the device's
  * children, in reverse bhnd probe order, terminating if any call to
  * device_detach() fails.
  */

Modified: head/sys/dev/bxe/ecore_hsi.h
==============================================================================
--- head/sys/dev/bxe/ecore_hsi.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/bxe/ecore_hsi.h	Tue May 17 12:52:31 2016	(r300050)
@@ -3709,9 +3709,9 @@ struct cstorm_toe_ag_context
 	uint32_t snd_max /* The ACK sequence number received in the last completed DDP */;
 #if defined(__BIG_ENDIAN)
 	uint16_t __agg_vars3 /* Various aggregative variables*/;
-	uint16_t __reserved67 /* A counter for the number of RQ WQEs with invalidate the the USTORM encountered */;
+	uint16_t __reserved67 /* A counter for the number of RQ WQEs with invalidate the USTORM encountered */;
 #elif defined(__LITTLE_ENDIAN)
-	uint16_t __reserved67 /* A counter for the number of RQ WQEs with invalidate the the USTORM encountered */;
+	uint16_t __reserved67 /* A counter for the number of RQ WQEs with invalidate the USTORM encountered */;
 	uint16_t __agg_vars3 /* Various aggregative variables*/;
 #endif
 #if defined(__BIG_ENDIAN)

Modified: head/sys/dev/drm2/i915/intel_crt.c
==============================================================================
--- head/sys/dev/drm2/i915/intel_crt.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/i915/intel_crt.c	Tue May 17 12:52:31 2016	(r300050)
@@ -794,7 +794,7 @@ void intel_crt_init(struct drm_device *d
 	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 
 	/*
-	 * TODO: find a proper way to discover whether we need to set the the
+	 * TODO: find a proper way to discover whether we need to set the
 	 * polarity and link reversal bits or not, instead of relying on the
 	 * BIOS.
 	 */

Modified: head/sys/dev/drm2/i915/intel_display.c
==============================================================================
--- head/sys/dev/drm2/i915/intel_display.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/i915/intel_display.c	Tue May 17 12:52:31 2016	(r300050)
@@ -7971,7 +7971,7 @@ bool intel_set_mode(struct drm_crtc *crt
 		crtc->mode = *mode;
 
 	/* Only after disabling all output pipelines that will be changed can we
-	 * update the the output configuration. */
+	 * update the output configuration. */
 	intel_modeset_update_state(dev, prepare_pipes);
 
 	if (dev_priv->display.modeset_global_resources)

Modified: head/sys/dev/drm2/radeon/atombios.h
==============================================================================
--- head/sys/dev/drm2/radeon/atombios.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/radeon/atombios.h	Tue May 17 12:52:31 2016	(r300050)
@@ -2734,8 +2734,8 @@ ucMaxNBVoltageHigh:     Voltage regulato
 ucMinNBVoltageHigh:     Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.
 
 
-usInterNBVoltageLow:    Voltage regulator dependent PWM value. The value makes the the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
-usInterNBVoltageHigh:   Voltage regulator dependent PWM value. The value makes the the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
+usInterNBVoltageLow:    Voltage regulator dependent PWM value. The value makes the voltage >=Min NB voltage but <=InterNBVoltageHigh. Set this to 0x0000 if VC without PWM or no VC at all.
+usInterNBVoltageHigh:   Voltage regulator dependent PWM value. The value makes the voltage >=InterNBVoltageLow but <=Max NB voltage.Set this to 0x0000 if VC without PWM or no VC at all.
 */
 
 

Modified: head/sys/dev/drm2/radeon/r300_reg.h
==============================================================================
--- head/sys/dev/drm2/radeon/r300_reg.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/radeon/r300_reg.h	Tue May 17 12:52:31 2016	(r300050)
@@ -356,7 +356,7 @@ __FBSDID("$FreeBSD$");
 #       define R300_PVS_CNTL_1_PROGRAM_START_SHIFT   0
 #       define R300_PVS_CNTL_1_POS_END_SHIFT         10
 #       define R300_PVS_CNTL_1_PROGRAM_END_SHIFT     20
-/* Addresses are relative the the vertex program parameters area. */
+/* Addresses are relative the vertex program parameters area. */
 #define R300_VAP_PVS_CNTL_2                 0x22D4
 #       define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
 #       define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT  16

Modified: head/sys/dev/drm2/radeon/radeon_device.c
==============================================================================
--- head/sys/dev/drm2/radeon/radeon_device.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/radeon/radeon_device.c	Tue May 17 12:52:31 2016	(r300050)
@@ -191,7 +191,7 @@ void radeon_scratch_free(struct radeon_d
 
 /*
  * radeon_wb_*()
- * Writeback is the the method by which the the GPU updates special pages
+ * Writeback is the method by which the GPU updates special pages
  * in memory with the status of certain GPU events (fences, ring pointers,
  * etc.).
  */

Modified: head/sys/dev/drm2/radeon/radeon_fence.c
==============================================================================
--- head/sys/dev/drm2/radeon/radeon_fence.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/radeon/radeon_fence.c	Tue May 17 12:52:31 2016	(r300050)
@@ -45,7 +45,7 @@ __FBSDID("$FreeBSD$");
  * for GPU/CPU synchronization.  When the fence is written,
  * it is expected that all buffers associated with that fence
  * are no longer in use by the associated ring on the GPU and
- * that the the relevant GPU caches have been flushed.  Whether
+ * that the relevant GPU caches have been flushed.  Whether
  * we use a scratch register or memory location depends on the asic
  * and whether writeback is enabled.
  */

Modified: head/sys/dev/drm2/radeon/radeon_gart.c
==============================================================================
--- head/sys/dev/drm2/radeon/radeon_gart.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/drm2/radeon/radeon_gart.c	Tue May 17 12:52:31 2016	(r300050)
@@ -413,7 +413,7 @@ void radeon_gart_fini(struct radeon_devi
  * (uncached system pages).
  * Each VM has an ID associated with it and there is a page table
  * associated with each VMID.  When execting a command buffer,
- * the kernel tells the the ring what VMID to use for that command
+ * the kernel tells the ring what VMID to use for that command
  * buffer.  VMIDs are allocated dynamically as commands are submitted.
  * The userspace drivers maintain their own address space and the kernel
  * sets up their pages tables accordingly when they submit their

Modified: head/sys/dev/e1000/e1000_82575.c
==============================================================================
--- head/sys/dev/e1000/e1000_82575.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/e1000/e1000_82575.c	Tue May 17 12:52:31 2016	(r300050)
@@ -2416,7 +2416,7 @@ out:
  *  e1000_reset_mdicnfg_82580 - Reset MDICNFG destination and com_mdio bits
  *  @hw: pointer to the HW structure
  *
- *  This resets the the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
+ *  This resets the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
  *  the values found in the EEPROM.  This addresses an issue in which these
  *  bits are not restored from EEPROM after reset.
  **/

Modified: head/sys/dev/e1000/e1000_ich8lan.c
==============================================================================
--- head/sys/dev/e1000/e1000_ich8lan.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/e1000/e1000_ich8lan.c	Tue May 17 12:52:31 2016	(r300050)
@@ -4904,7 +4904,7 @@ static s32 e1000_id_led_init_pchlan(stru
  *  @hw: pointer to the HW structure
  *
  *  ICH8 use the PCI Express bus, but does not contain a PCI Express Capability
- *  register, so the the bus width is hard coded.
+ *  register, so the bus width is hard coded.
  **/
 static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)
 {

Modified: head/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c
==============================================================================
--- head/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/hyperv/storvsc/hv_storvsc_drv_freebsd.c	Tue May 17 12:52:31 2016	(r300050)
@@ -304,7 +304,7 @@ MODULE_DEPEND(storvsc, vmbus, 1, 1, 1);
  * We address this issue by implementing a sequentially
  * consistent protocol:
  *
- * 1. Channel callback is invoked while holding the the channel lock
+ * 1. Channel callback is invoked while holding the channel lock
  *    and an unloading driver will reset the channel callback under
  *    the protection of this channel lock.
  *

Modified: head/sys/dev/iwm/if_iwmreg.h
==============================================================================
--- head/sys/dev/iwm/if_iwmreg.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/iwm/if_iwmreg.h	Tue May 17 12:52:31 2016	(r300050)
@@ -3923,7 +3923,7 @@ enum iwm_tx_flags {
  *	cleared. Combination of IWM_RATE_MCS_*
  * @sta_id: index of destination station in FW station table
  * @sec_ctl: security control, IWM_TX_CMD_SEC_*
- * @initial_rate_index: index into the the rate table for initial TX attempt.
+ * @initial_rate_index: index into the rate table for initial TX attempt.
  *	Applied if IWM_TX_CMD_FLG_STA_RATE_MSK is set, normally 0 for data frames.
  * @key: security key
  * @next_frame_flags: IWM_TX_CMD_SEC_* and IWM_TX_CMD_NEXT_FRAME_*
@@ -4274,7 +4274,7 @@ struct iwm_beacon_notif {
 
 /**
  * enum iwm_dump_control - dump (flush) control flags
- * @IWM_DUMP_TX_FIFO_FLUSH: Dump MSDUs until the the FIFO is empty
+ * @IWM_DUMP_TX_FIFO_FLUSH: Dump MSDUs until the FIFO is empty
  *	and the TFD queues are empty.
  */
 enum iwm_dump_control {

Modified: head/sys/dev/netmap/netmap.c
==============================================================================
--- head/sys/dev/netmap/netmap.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/netmap/netmap.c	Tue May 17 12:52:31 2016	(r300050)
@@ -2700,7 +2700,7 @@ netmap_detach_common(struct netmap_adapt
 }
 
 /* Wrapper for the register callback provided hardware drivers.
- * na->ifp == NULL means the the driver module has been
+ * na->ifp == NULL means the driver module has been
  * unloaded, so we cannot call into it.
  * Note that module unloading, in our patched linux drivers,
  * happens under NMG_LOCK and after having stopped all the

Modified: head/sys/dev/ow/ow.c
==============================================================================
--- head/sys/dev/ow/ow.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/ow/ow.c	Tue May 17 12:52:31 2016	(r300050)
@@ -343,7 +343,7 @@ again:
 		 * See AN397 section 5.II.C.3 for the algorithm (though a bit
 		 * poorly stated). The search command forces each device to
 		 * send ROM ID bits one at a time (first the bit, then the
-		 * complement) the the master (us) sends back a bit. If the
+		 * complement) the master (us) sends back a bit. If the
 		 * device's bit doesn't match what we send back, that device
 		 * stops sending bits back. So each time through we remember
 		 * where we made the last decision (always 0). If there's a

Modified: head/sys/dev/pms/RefTisa/sallsdk/spc/mpi.c
==============================================================================
--- head/sys/dev/pms/RefTisa/sallsdk/spc/mpi.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/pms/RefTisa/sallsdk/spc/mpi.c	Tue May 17 12:52:31 2016	(r300050)
@@ -806,7 +806,7 @@ mpiMsgConsume(
  *  \param messagePtr1 Pointer to the returned message buffer to free
  *  \param messagePtr2 Pointer to the returned message buffer to free if bc > 1
  *
- * Returns consumed and processed message to the the specified outbounf queue
+ * Returns consumed and processed message to the specified outbounf queue
  *
  * Return:
  *         AGSA_RC_SUCCESS if the message has been returned succesfully

Modified: head/sys/dev/pms/RefTisa/sat/src/smsat.c
==============================================================================
--- head/sys/dev/pms/RefTisa/sat/src/smsat.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/pms/RefTisa/sat/src/smsat.c	Tue May 17 12:52:31 2016	(r300050)
@@ -10883,7 +10883,7 @@ smsatReadCapacity10(
     /*
      * Setting RETURNED LOGICAL BLOCK ADDRESS in READ CAPACITY(10) response data:
      * SBC-2 specifies that if the capacity exceeded the 4-byte RETURNED LOGICAL
-     * BLOCK ADDRESS in READ CAPACITY(10) parameter data, the the RETURNED LOGICAL
+     * BLOCK ADDRESS in READ CAPACITY(10) parameter data, the RETURNED LOGICAL
      * BLOCK ADDRESS should be set to 0xFFFFFFFF so the application client would
      * then issue a READ CAPACITY(16) command.
      */

Modified: head/sys/dev/pms/RefTisa/tisa/sassata/sata/host/sat.c
==============================================================================
--- head/sys/dev/pms/RefTisa/tisa/sassata/sata/host/sat.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/pms/RefTisa/tisa/sassata/sata/host/sat.c	Tue May 17 12:52:31 2016	(r300050)
@@ -5975,7 +5975,7 @@ GLOBAL bit32  satReadCapacity10(
     /*
      * Setting RETURNED LOGICAL BLOCK ADDRESS in READ CAPACITY(10) response data:
      * SBC-2 specifies that if the capacity exceeded the 4-byte RETURNED LOGICAL
-     * BLOCK ADDRESS in READ CAPACITY(10) parameter data, the the RETURNED LOGICAL
+     * BLOCK ADDRESS in READ CAPACITY(10) parameter data, the RETURNED LOGICAL
      * BLOCK ADDRESS should be set to 0xFFFFFFFF so the application client would
      * then issue a READ CAPACITY(16) command.
      */

Modified: head/sys/dev/random/fortuna.c
==============================================================================
--- head/sys/dev/random/fortuna.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/random/fortuna.c	Tue May 17 12:52:31 2016	(r300050)
@@ -234,7 +234,7 @@ random_fortuna_process_event(struct harv
 	pl = event->he_destination % RANDOM_FORTUNA_NPOOLS;
 	randomdev_hash_iterate(&fortuna_state.fs_pool[pl].fsp_hash, event, sizeof(*event));
 	/*-
-	 * Don't wrap the length. Doing the the hard way so as not to wrap at MAXUINT.
+	 * Don't wrap the length. Doing this the hard way so as not to wrap at MAXUINT.
 	 * This is a "saturating" add.
 	 * XXX: FIX!!: We don't actually need lengths for anything but fs_pool[0],
 	 * but it's been useful debugging to see them all.

Modified: head/sys/dev/sfxge/common/ef10_ev.c
==============================================================================
--- head/sys/dev/sfxge/common/ef10_ev.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/dev/sfxge/common/ef10_ev.c	Tue May 17 12:52:31 2016	(r300050)
@@ -547,7 +547,7 @@ ef10_ev_rx(
 		flags |= EFX_PKT_PREFIX_LEN;
 	}
 
-	/* Calculate the index of the the last descriptor consumed */
+	/* Calculate the index of the last descriptor consumed */
 	last_used_id = (eersp->eers_rx_read_ptr - 1) & eersp->eers_rx_mask;
 
 	/* Check for errors that invalidate checksum and L3/L4 fields */

Modified: head/sys/mips/conf/DIR-825C1.hints
==============================================================================
--- head/sys/mips/conf/DIR-825C1.hints	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/mips/conf/DIR-825C1.hints	Tue May 17 12:52:31 2016	(r300050)
@@ -6,7 +6,7 @@ hint.argemdio.0.maddr=0x19000000
 hint.argemdio.0.msize=0x1000
 hint.argemdio.0.order=0
 
-# 0x1ffe0004 is the the "unit MAC".
+# 0x1ffe0004 is the "unit MAC".
 # 0x1ffe0018 is the second "MAC".
 # Right now this doesn't have any option for more than one
 # "unit MACs", so:

Modified: head/sys/net/altq/altq_cbq.c
==============================================================================
--- head/sys/net/altq/altq_cbq.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/net/altq/altq_cbq.c	Tue May 17 12:52:31 2016	(r300050)
@@ -702,7 +702,7 @@ cbq_modify_class(acp)
  *
  * This function create a new traffic class in the CBQ class hierarchy of
  * given parameters.  The class that created is either the root, default,
- * or a new dynamic class.  If CBQ is not initilaized, the the root class
+ * or a new dynamic class.  If CBQ is not initilaized, the root class
  * will be created.
  */
 static int

Modified: head/sys/ofed/drivers/infiniband/debug/memtrack.c
==============================================================================
--- head/sys/ofed/drivers/infiniband/debug/memtrack.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/ofed/drivers/infiniband/debug/memtrack.c	Tue May 17 12:52:31 2016	(r300050)
@@ -510,7 +510,7 @@ EXPORT_SYMBOL(is_non_trackable_free_func
 
 
 /* WA - In this function handles confirm
-   the the function name is
+   the function name is
    '__ib_umem_release' or 'ib_umem_get'
    In this case we won't track the
    memory there because the kernel

Modified: head/sys/ofed/drivers/infiniband/debug/memtrack.h
==============================================================================
--- head/sys/ofed/drivers/infiniband/debug/memtrack.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/ofed/drivers/infiniband/debug/memtrack.h	Tue May 17 12:52:31 2016	(r300050)
@@ -64,7 +64,7 @@ int is_non_trackable_alloc_func(const ch
 int is_non_trackable_free_func(const char *func_name);
 
 /* WA - In this function handles confirm
-   the the function name is
+   the function name is
    '__ib_umem_release' or 'ib_umem_get'
    In this case we won't track the
    memory there because the kernel

Modified: head/sys/ofed/drivers/net/mlx4/main.c
==============================================================================
--- head/sys/ofed/drivers/net/mlx4/main.c	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/ofed/drivers/net/mlx4/main.c	Tue May 17 12:52:31 2016	(r300050)
@@ -164,7 +164,7 @@ MODULE_PARM_DESC(fast_drop,
 int mlx4_enable_64b_cqe_eqe = 1;
 module_param_named(enable_64b_cqe_eqe, mlx4_enable_64b_cqe_eqe, int, 0644);
 MODULE_PARM_DESC(enable_64b_cqe_eqe,
-		 "Enable 64 byte CQEs/EQEs when the the FW supports this if non-zero (default: 1)");
+		 "Enable 64 byte CQEs/EQEs when the FW supports this if non-zero (default: 1)");
 
 #define HCA_GLOBAL_CAP_MASK            0
 

Modified: head/sys/xen/interface/io/blkif.h
==============================================================================
--- head/sys/xen/interface/io/blkif.h	Tue May 17 12:48:30 2016	(r300049)
+++ head/sys/xen/interface/io/blkif.h	Tue May 17 12:52:31 2016	(r300050)
@@ -324,7 +324,7 @@
  *      access (even when it should be read-only). If the frontend hits the
  *      maximum number of allowed persistently mapped grants, it can fallback
  *      to non persistent mode. This will cause a performance degradation,
- *      since the the backend driver will still try to map those grants
+ *      since the backend driver will still try to map those grants
  *      persistently. Since the persistent grants protocol is compatible with
  *      the previous protocol, a frontend driver can choose to work in
  *      persistent mode even when the backend doesn't support it.

Modified: head/usr.bin/numactl/numactl.1
==============================================================================
--- head/usr.bin/numactl/numactl.1	Tue May 17 12:48:30 2016	(r300049)
+++ head/usr.bin/numactl/numactl.1	Tue May 17 12:52:31 2016	(r300050)
@@ -83,7 +83,7 @@ The options are as follows:
 .Bl -tag -width ".Fl -cpudomain Ar domain"
 .It Fl -cpudomain Ar domain , Fl c Ar domain
 Set the given CPU scheduling policy.
-Constrain the the object (tid, pid, command) to run on CPUs
+Constrain the object (tid, pid, command) to run on CPUs
 that belong to the given domain.
 .It Fl -get , Fl g
 Retrieve the NUMA policy for the given thread or process id.

Modified: head/usr.sbin/bsdconfig/share/dialog.subr
==============================================================================
--- head/usr.sbin/bsdconfig/share/dialog.subr	Tue May 17 12:48:30 2016	(r300049)
+++ head/usr.sbin/bsdconfig/share/dialog.subr	Tue May 17 12:52:31 2016	(r300050)
@@ -1815,7 +1815,7 @@ f_dialog_inputstr_fetch()
 # f_dialog_input $var_to_set $prompt [$init [$hline]]
 #
 # Prompt the user with a dialog(1) inputbox to enter some value. The inputbox
-# remains until the the user presses ENTER or ESC, or otherwise ends the
+# remains until the user presses ENTER or ESC, or otherwise ends the
 # editing session (by selecting `Cancel' for example).
 #
 # If the user presses ENTER, the exit status is zero (success), otherwise if

Modified: head/usr.sbin/pciconf/pciconf.8
==============================================================================
--- head/usr.sbin/pciconf/pciconf.8	Tue May 17 12:48:30 2016	(r300049)
+++ head/usr.sbin/pciconf/pciconf.8	Tue May 17 12:52:31 2016	(r300050)
@@ -237,7 +237,7 @@ prefix indicates if the keyword is read-
 or read-write
 .Dq rw .
 The second string provides the keyword name.
-The text after the the equals sign lists the value of the keyword which is
+The text after the equals sign lists the value of the keyword which is
 usually an ASCII string.
 .Pp
 If the optional

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