svn commit: r297447 - head/sys/dev/ahci

[Zbigniew Bodek]

Author: zbb
Date: Thu Mar 31 11:18:52 2016
New Revision: 297447
URL: https://svnweb.freebsd.org/changeset/base/297447

Log:
  Disable MSI-x for AHCI on Alpine plattform
  
  Changes introduced to AHCI code adding support for MSI-x
  caused interrupt storm on Alpine boards.
  This is unintended behaviour so added quirk to omit this functionality.
  
  Reviewed by:   mav
  Submitted by:  Marcin Mazurek <mma at semihalf.com>
  Obtained from: Semihalf
  Sponsored by:  Annapurna Labs
  Differential Revision: https://reviews.freebsd.org/D4301

Modified:
  head/sys/dev/ahci/ahci.h
  head/sys/dev/ahci/ahci_pci.c

Modified: head/sys/dev/ahci/ahci.h
==============================================================================
--- head/sys/dev/ahci/ahci.h	Thu Mar 31 11:07:24 2016	(r297446)
+++ head/sys/dev/ahci/ahci.h	Thu Mar 31 11:18:52 2016	(r297447)
@@ -597,6 +597,7 @@ enum ahci_err_type {
 #define AHCI_Q_1MSI		0x00020000
 #define AHCI_Q_FORCE_PI		0x00040000
 #define AHCI_Q_RESTORE_CAP	0x00080000
+#define AHCI_Q_NOMSIX		0x00100000
 
 #define AHCI_Q_BIT_STRING	\
 	"\020"			\
@@ -619,7 +620,8 @@ enum ahci_err_type {
 	"\021ABAR0"		\
 	"\0221MSI"              \
 	"\023FORCE_PI"          \
-	"\024RESTORE_CAP"
+	"\024RESTORE_CAP"	\
+	"\025NOMSIX"
 
 int ahci_attach(device_t dev);
 int ahci_detach(device_t dev);

Modified: head/sys/dev/ahci/ahci_pci.c
==============================================================================
--- head/sys/dev/ahci/ahci_pci.c	Thu Mar 31 11:07:24 2016	(r297446)
+++ head/sys/dev/ahci/ahci_pci.c	Thu Mar 31 11:18:52 2016	(r297447)
@@ -293,7 +293,7 @@ static const struct {
 	{0x11851039, 0x00, "SiS 968",		0},
 	{0x01861039, 0x00, "SiS 968",		0},
 	{0xa01c177d, 0x00, "ThunderX",		AHCI_Q_ABAR0|AHCI_Q_1MSI},
-	{0x00311c36, 0x00, "Annapurna",		AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP},
+	{0x00311c36, 0x00, "Annapurna",		AHCI_Q_FORCE_PI|AHCI_Q_RESTORE_CAP|AHCI_Q_NOMSIX},
 	{0x00000000, 0x00, NULL,		0}
 };
 
@@ -437,6 +437,9 @@ ahci_pci_attach(device_t dev)
 	    &ctlr->r_rid, RF_ACTIVE)))
 		return ENXIO;
 
+	if (ctlr->quirks & AHCI_Q_NOMSIX)
+		msix_count = 0;
+
 	/* Read MSI-x BAR IDs if supported */
 	if (msix_count > 0) {
 		error = ahci_pci_read_msix_bars(dev, &table_bar, &pba_bar);