svn commit: r297039 - head/sys/x86/x86

[Poul-Henning Kamp]

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In message <20160327130706.GA1741 at kib.kiev.ua>, Konstantin Belousov writes:

>> I haven't seen a single (hardware) system since I started measuring
>> this 15-20 yeas ago on which the i8524 is not fed from the same clock
>> as the TSC.

A very important and relevant detail here is that the *only*
clock/counter which has a standardized frequency *is* the i8254
counter.

>RTC needs its own dedicated crystal.

The RTC *crystal* may not even exist, only the RTC itself which may
be driven by gremlins on a threadmill for all we care.

Besides, getting hold of *precise* timing from the RTC is a nightmare,
it's not meant to be used for that.

>I was not able to find any specifications for allowed jitter in PCH PLLs,
>but I would expect that above IDT chips have much better stability than
>something in overheating PCH.

Jitter requirements are pretty tight for anything you're going to
PLL into the GHz range, but any quartz crystal is going to have much
better phase-noise spec than anything we can measure in the digital
noise of a modern computer.

(Often the PLL chips modulate the quartz to spread out EMI spurs,
look for "spread-spectrum" settings.)

>> > some hypervisors start offering modes where old ISA peripherals
>> > are not emulated, 

How do they expect people to run MS Flight Simulator then ?  :-)

>I think we have no choice but do something for ISA/LPC-less configurations.
>We could even trust CPU report about its frequency as the last resort.

Usually the errors will be magnificient, so a trivial sanity-check will
catch them.  Don't leave home without it.

-- 
Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
phk at FreeBSD.ORG         | TCP/IP since RFC 956
FreeBSD committer       | BSD since 4.3-tahoe    
Never attribute to malice what can adequately be explained by incompetence.