svn commit: r296256 - in head/sys/arm64: arm64 include
Wojciech Macek
wma at FreeBSD.org
Tue Mar 1 08:15:02 UTC 2016
Author: wma
Date: Tue Mar 1 08:15:00 2016
New Revision: 296256
URL: https://svnweb.freebsd.org/changeset/base/296256
Log:
Enable SRE_EL2 on ARM64
Enable system register access for EL2. Alpine-V2 is
the first device requiring this to be enabled.
It is also in-sync with Linux initialization code,
and compatible with Alpine-V2 uboot requirements.
Obtained from: Semihalf
Submitted by: Michal Stanek <mst at semihalf.com>
Sponsored by: Annapurna Labs
Approved by: cognet (mentor)
Reviewed by: wma
Differential revision: https://reviews.freebsd.org/D5394
Modified:
head/sys/arm64/arm64/locore.S
head/sys/arm64/include/armreg.h
Modified: head/sys/arm64/arm64/locore.S
==============================================================================
--- head/sys/arm64/arm64/locore.S Tue Mar 1 07:06:36 2016 (r296255)
+++ head/sys/arm64/arm64/locore.S Tue Mar 1 08:15:00 2016 (r296256)
@@ -265,6 +265,7 @@ drop_to_el1:
mrs x2, icc_sre_el2
orr x2, x2, #ICC_SRE_EL2_EN /* Enable access from insecure EL1 */
+ orr x2, x2, #ICC_SRE_EL2_SRE /* Enable system registers */
msr icc_sre_el2, x2
2:
Modified: head/sys/arm64/include/armreg.h
==============================================================================
--- head/sys/arm64/include/armreg.h Tue Mar 1 07:06:36 2016 (r296255)
+++ head/sys/arm64/include/armreg.h Tue Mar 1 08:15:00 2016 (r296256)
@@ -131,6 +131,7 @@
#define ICC_SRE_EL1_SRE (1U << 0)
/* ICC_SRE_EL2 */
+#define ICC_SRE_EL2_SRE (1U << 0)
#define ICC_SRE_EL2_EN (1U << 3)
/* ID_AA64DFR0_EL1 */
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