svn commit: r293791 - stable/9/sys/dev/bxe
David C Somayajulu
davidcs at FreeBSD.org
Tue Jan 12 23:48:41 UTC 2016
Author: davidcs
Date: Tue Jan 12 23:48:39 2016
New Revision: 293791
URL: https://svnweb.freebsd.org/changeset/base/293791
Log:
MFC r292639
Add support for firmware dump (a.k.a grcdump)
Added:
stable/9/sys/dev/bxe/bxe_dump.h
- copied unchanged from r292639, head/sys/dev/bxe/bxe_dump.h
stable/9/sys/dev/bxe/bxe_ioctl.h
- copied unchanged from r292639, head/sys/dev/bxe/bxe_ioctl.h
Modified:
stable/9/sys/dev/bxe/bxe.c
stable/9/sys/dev/bxe/bxe.h
stable/9/sys/dev/bxe/ecore_init.h
Directory Properties:
stable/9/ (props changed)
stable/9/sys/ (props changed)
stable/9/sys/dev/ (props changed)
Modified: stable/9/sys/dev/bxe/bxe.c
==============================================================================
--- stable/9/sys/dev/bxe/bxe.c Tue Jan 12 23:44:03 2016 (r293790)
+++ stable/9/sys/dev/bxe/bxe.c Tue Jan 12 23:48:39 2016 (r293791)
@@ -747,6 +747,8 @@ static __noinline int bxe_nic_unload(str
static void bxe_handle_sp_tq(void *context, int pending);
static void bxe_handle_fp_tq(void *context, int pending);
+static int bxe_add_cdev(struct bxe_softc *sc);
+static void bxe_del_cdev(struct bxe_softc *sc);
/* calculate crc32 on a buffer (NOTE: crc32_length MUST be aligned to 8) */
uint32_t
@@ -4514,7 +4516,7 @@ bxe_nic_unload(struct bxe_softc *sc,
sc->rx_mode = BXE_RX_MODE_NONE;
/* XXX set rx mode ??? */
- if (IS_PF(sc)) {
+ if (IS_PF(sc) && !sc->grcdump_done) {
/* set ALWAYS_ALIVE bit in shmem */
sc->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
@@ -4534,7 +4536,8 @@ bxe_nic_unload(struct bxe_softc *sc,
; /* bxe_vfpf_close_vf(sc); */
} else if (unload_mode != UNLOAD_RECOVERY) {
/* if this is a normal/close unload need to clean up chip */
- bxe_chip_cleanup(sc, unload_mode, keep_link);
+ if (!sc->grcdump_done)
+ bxe_chip_cleanup(sc, unload_mode, keep_link);
} else {
/* Send the UNLOAD_REQUEST to the MCP */
bxe_send_unload_req(sc, unload_mode);
@@ -16317,6 +16320,12 @@ bxe_add_sysctls(struct bxe_softc *sc)
CTLFLAG_RW, &sc->debug,
"debug logging mode");
+ sc->trigger_grcdump = 0;
+ SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "trigger_grcdump",
+ CTLFLAG_RW, &sc->trigger_grcdump, 0,
+ "set by driver when a grcdump is needed");
+
+
sc->rx_budget = bxe_rx_budget;
SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_budget",
CTLFLAG_RW, &sc->rx_budget, 0,
@@ -16445,8 +16454,20 @@ bxe_attach(device_t dev)
return (ENXIO);
}
+ if (bxe_add_cdev(sc) != 0) {
+ if (sc->ifnet != NULL) {
+ ether_ifdetach(sc->ifnet);
+ }
+ ifmedia_removeall(&sc->ifmedia);
+ bxe_release_mutexes(sc);
+ bxe_deallocate_bars(sc);
+ pci_disable_busmaster(dev);
+ return (ENXIO);
+ }
+
/* allocate device interrupts */
if (bxe_interrupt_alloc(sc) != 0) {
+ bxe_del_cdev(sc);
if (sc->ifnet != NULL) {
ether_ifdetach(sc->ifnet);
}
@@ -16460,6 +16481,7 @@ bxe_attach(device_t dev)
/* allocate ilt */
if (bxe_alloc_ilt_mem(sc) != 0) {
bxe_interrupt_free(sc);
+ bxe_del_cdev(sc);
if (sc->ifnet != NULL) {
ether_ifdetach(sc->ifnet);
}
@@ -16474,6 +16496,7 @@ bxe_attach(device_t dev)
if (bxe_alloc_hsi_mem(sc) != 0) {
bxe_free_ilt_mem(sc);
bxe_interrupt_free(sc);
+ bxe_del_cdev(sc);
if (sc->ifnet != NULL) {
ether_ifdetach(sc->ifnet);
}
@@ -16545,6 +16568,8 @@ bxe_detach(device_t dev)
return(EBUSY);
}
+ bxe_del_cdev(sc);
+
/* stop the periodic callout */
bxe_periodic_stop(sc);
@@ -18865,3 +18890,457 @@ ecore_storm_memset_struct(struct bxe_sof
}
}
+
+/*
+ * character device - ioctl interface definitions
+ */
+
+
+#include "bxe_dump.h"
+#include "bxe_ioctl.h"
+#include <sys/conf.h>
+
+static int bxe_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
+ struct thread *td);
+
+static struct cdevsw bxe_cdevsw = {
+ .d_version = D_VERSION,
+ .d_ioctl = bxe_eioctl,
+ .d_name = "bxecnic",
+};
+
+#define BXE_PATH(sc) (CHIP_IS_E1x(sc) ? 0 : (sc->pcie_func & 1))
+
+
+#define DUMP_ALL_PRESETS 0x1FFF
+#define DUMP_MAX_PRESETS 13
+#define IS_E1_REG(chips) ((chips & DUMP_CHIP_E1) == DUMP_CHIP_E1)
+#define IS_E1H_REG(chips) ((chips & DUMP_CHIP_E1H) == DUMP_CHIP_E1H)
+#define IS_E2_REG(chips) ((chips & DUMP_CHIP_E2) == DUMP_CHIP_E2)
+#define IS_E3A0_REG(chips) ((chips & DUMP_CHIP_E3A0) == DUMP_CHIP_E3A0)
+#define IS_E3B0_REG(chips) ((chips & DUMP_CHIP_E3B0) == DUMP_CHIP_E3B0)
+
+#define IS_REG_IN_PRESET(presets, idx) \
+ ((presets & (1 << (idx-1))) == (1 << (idx-1)))
+
+
+static int
+bxe_get_preset_regs_len(struct bxe_softc *sc, uint32_t preset)
+{
+ if (CHIP_IS_E1(sc))
+ return dump_num_registers[0][preset-1];
+ else if (CHIP_IS_E1H(sc))
+ return dump_num_registers[1][preset-1];
+ else if (CHIP_IS_E2(sc))
+ return dump_num_registers[2][preset-1];
+ else if (CHIP_IS_E3A0(sc))
+ return dump_num_registers[3][preset-1];
+ else if (CHIP_IS_E3B0(sc))
+ return dump_num_registers[4][preset-1];
+ else
+ return 0;
+}
+
+static int
+bxe_get_max_regs_len(struct bxe_softc *sc)
+{
+ uint32_t preset_idx;
+ int regdump_len32, len32;
+
+ regdump_len32 = bxe_get_preset_regs_len(sc, 1);
+
+ /* Calculate the total preset regs length */
+ for (preset_idx = 2; preset_idx <= DUMP_MAX_PRESETS; preset_idx++) {
+
+ len32 = bxe_get_preset_regs_len(sc, preset_idx);
+
+ if (regdump_len32 < len32)
+ regdump_len32 = len32;
+ }
+
+ return regdump_len32;
+}
+
+static int
+bxe_get_total_regs_len32(struct bxe_softc *sc)
+{
+ uint32_t preset_idx;
+ int regdump_len32 = 0;
+
+
+ /* Calculate the total preset regs length */
+ for (preset_idx = 1; preset_idx <= DUMP_MAX_PRESETS; preset_idx++) {
+ regdump_len32 += bxe_get_preset_regs_len(sc, preset_idx);
+ }
+
+ return regdump_len32;
+}
+
+static const uint32_t *
+__bxe_get_page_addr_ar(struct bxe_softc *sc)
+{
+ if (CHIP_IS_E2(sc))
+ return page_vals_e2;
+ else if (CHIP_IS_E3(sc))
+ return page_vals_e3;
+ else
+ return NULL;
+}
+
+static uint32_t
+__bxe_get_page_reg_num(struct bxe_softc *sc)
+{
+ if (CHIP_IS_E2(sc))
+ return PAGE_MODE_VALUES_E2;
+ else if (CHIP_IS_E3(sc))
+ return PAGE_MODE_VALUES_E3;
+ else
+ return 0;
+}
+
+static const uint32_t *
+__bxe_get_page_write_ar(struct bxe_softc *sc)
+{
+ if (CHIP_IS_E2(sc))
+ return page_write_regs_e2;
+ else if (CHIP_IS_E3(sc))
+ return page_write_regs_e3;
+ else
+ return NULL;
+}
+
+static uint32_t
+__bxe_get_page_write_num(struct bxe_softc *sc)
+{
+ if (CHIP_IS_E2(sc))
+ return PAGE_WRITE_REGS_E2;
+ else if (CHIP_IS_E3(sc))
+ return PAGE_WRITE_REGS_E3;
+ else
+ return 0;
+}
+
+static const struct reg_addr *
+__bxe_get_page_read_ar(struct bxe_softc *sc)
+{
+ if (CHIP_IS_E2(sc))
+ return page_read_regs_e2;
+ else if (CHIP_IS_E3(sc))
+ return page_read_regs_e3;
+ else
+ return NULL;
+}
+
+static uint32_t
+__bxe_get_page_read_num(struct bxe_softc *sc)
+{
+ if (CHIP_IS_E2(sc))
+ return PAGE_READ_REGS_E2;
+ else if (CHIP_IS_E3(sc))
+ return PAGE_READ_REGS_E3;
+ else
+ return 0;
+}
+
+static bool
+bxe_is_reg_in_chip(struct bxe_softc *sc, const struct reg_addr *reg_info)
+{
+ if (CHIP_IS_E1(sc))
+ return IS_E1_REG(reg_info->chips);
+ else if (CHIP_IS_E1H(sc))
+ return IS_E1H_REG(reg_info->chips);
+ else if (CHIP_IS_E2(sc))
+ return IS_E2_REG(reg_info->chips);
+ else if (CHIP_IS_E3A0(sc))
+ return IS_E3A0_REG(reg_info->chips);
+ else if (CHIP_IS_E3B0(sc))
+ return IS_E3B0_REG(reg_info->chips);
+ else
+ return 0;
+}
+
+static bool
+bxe_is_wreg_in_chip(struct bxe_softc *sc, const struct wreg_addr *wreg_info)
+{
+ if (CHIP_IS_E1(sc))
+ return IS_E1_REG(wreg_info->chips);
+ else if (CHIP_IS_E1H(sc))
+ return IS_E1H_REG(wreg_info->chips);
+ else if (CHIP_IS_E2(sc))
+ return IS_E2_REG(wreg_info->chips);
+ else if (CHIP_IS_E3A0(sc))
+ return IS_E3A0_REG(wreg_info->chips);
+ else if (CHIP_IS_E3B0(sc))
+ return IS_E3B0_REG(wreg_info->chips);
+ else
+ return 0;
+}
+
+/**
+ * bxe_read_pages_regs - read "paged" registers
+ *
+ * @bp device handle
+ * @p output buffer
+ *
+ * Reads "paged" memories: memories that may only be read by first writing to a
+ * specific address ("write address") and then reading from a specific address
+ * ("read address"). There may be more than one write address per "page" and
+ * more than one read address per write address.
+ */
+static void
+bxe_read_pages_regs(struct bxe_softc *sc, uint32_t *p, uint32_t preset)
+{
+ uint32_t i, j, k, n;
+
+ /* addresses of the paged registers */
+ const uint32_t *page_addr = __bxe_get_page_addr_ar(sc);
+ /* number of paged registers */
+ int num_pages = __bxe_get_page_reg_num(sc);
+ /* write addresses */
+ const uint32_t *write_addr = __bxe_get_page_write_ar(sc);
+ /* number of write addresses */
+ int write_num = __bxe_get_page_write_num(sc);
+ /* read addresses info */
+ const struct reg_addr *read_addr = __bxe_get_page_read_ar(sc);
+ /* number of read addresses */
+ int read_num = __bxe_get_page_read_num(sc);
+ uint32_t addr, size;
+
+ for (i = 0; i < num_pages; i++) {
+ for (j = 0; j < write_num; j++) {
+ REG_WR(sc, write_addr[j], page_addr[i]);
+
+ for (k = 0; k < read_num; k++) {
+ if (IS_REG_IN_PRESET(read_addr[k].presets, preset)) {
+ size = read_addr[k].size;
+ for (n = 0; n < size; n++) {
+ addr = read_addr[k].addr + n*4;
+ *p++ = REG_RD(sc, addr);
+ }
+ }
+ }
+ }
+ }
+ return;
+}
+
+
+static int
+bxe_get_preset_regs(struct bxe_softc *sc, uint32_t *p, uint32_t preset)
+{
+ uint32_t i, j, addr;
+ const struct wreg_addr *wreg_addr_p = NULL;
+
+ if (CHIP_IS_E1(sc))
+ wreg_addr_p = &wreg_addr_e1;
+ else if (CHIP_IS_E1H(sc))
+ wreg_addr_p = &wreg_addr_e1h;
+ else if (CHIP_IS_E2(sc))
+ wreg_addr_p = &wreg_addr_e2;
+ else if (CHIP_IS_E3A0(sc))
+ wreg_addr_p = &wreg_addr_e3;
+ else if (CHIP_IS_E3B0(sc))
+ wreg_addr_p = &wreg_addr_e3b0;
+ else
+ return (-1);
+
+ /* Read the idle_chk registers */
+ for (i = 0; i < IDLE_REGS_COUNT; i++) {
+ if (bxe_is_reg_in_chip(sc, &idle_reg_addrs[i]) &&
+ IS_REG_IN_PRESET(idle_reg_addrs[i].presets, preset)) {
+ for (j = 0; j < idle_reg_addrs[i].size; j++)
+ *p++ = REG_RD(sc, idle_reg_addrs[i].addr + j*4);
+ }
+ }
+
+ /* Read the regular registers */
+ for (i = 0; i < REGS_COUNT; i++) {
+ if (bxe_is_reg_in_chip(sc, ®_addrs[i]) &&
+ IS_REG_IN_PRESET(reg_addrs[i].presets, preset)) {
+ for (j = 0; j < reg_addrs[i].size; j++)
+ *p++ = REG_RD(sc, reg_addrs[i].addr + j*4);
+ }
+ }
+
+ /* Read the CAM registers */
+ if (bxe_is_wreg_in_chip(sc, wreg_addr_p) &&
+ IS_REG_IN_PRESET(wreg_addr_p->presets, preset)) {
+ for (i = 0; i < wreg_addr_p->size; i++) {
+ *p++ = REG_RD(sc, wreg_addr_p->addr + i*4);
+
+ /* In case of wreg_addr register, read additional
+ registers from read_regs array
+ */
+ for (j = 0; j < wreg_addr_p->read_regs_count; j++) {
+ addr = *(wreg_addr_p->read_regs);
+ *p++ = REG_RD(sc, addr + j*4);
+ }
+ }
+ }
+
+ /* Paged registers are supported in E2 & E3 only */
+ if (CHIP_IS_E2(sc) || CHIP_IS_E3(sc)) {
+ /* Read "paged" registers */
+ bxe_read_pages_regs(sc, p, preset);
+ }
+
+ return 0;
+}
+
+static int
+bxe_grc_dump(struct bxe_softc *sc, bxe_grcdump_t *dump)
+{
+ int rval = 0;
+ uint32_t preset_idx;
+ uint8_t *buf;
+ uint32_t size;
+ struct dump_header *d_hdr;
+
+ ecore_disable_blocks_parity(sc);
+
+ buf = dump->grcdump;
+ d_hdr = dump->grcdump;
+
+ d_hdr->header_size = (sizeof(struct dump_header) >> 2) - 1;
+ d_hdr->version = BNX2X_DUMP_VERSION;
+ d_hdr->preset = DUMP_ALL_PRESETS;
+
+ if (CHIP_IS_E1(sc)) {
+ d_hdr->dump_meta_data = DUMP_CHIP_E1;
+ } else if (CHIP_IS_E1H(sc)) {
+ d_hdr->dump_meta_data = DUMP_CHIP_E1H;
+ } else if (CHIP_IS_E2(sc)) {
+ d_hdr->dump_meta_data = DUMP_CHIP_E2 |
+ (BXE_PATH(sc) ? DUMP_PATH_1 : DUMP_PATH_0);
+ } else if (CHIP_IS_E3A0(sc)) {
+ d_hdr->dump_meta_data = DUMP_CHIP_E3A0 |
+ (BXE_PATH(sc) ? DUMP_PATH_1 : DUMP_PATH_0);
+ } else if (CHIP_IS_E3B0(sc)) {
+ d_hdr->dump_meta_data = DUMP_CHIP_E3B0 |
+ (BXE_PATH(sc) ? DUMP_PATH_1 : DUMP_PATH_0);
+ }
+
+ dump->grcdump_dwords = sizeof(struct dump_header) >> 2;
+ buf += sizeof(struct dump_header);
+
+ for (preset_idx = 1; preset_idx <= DUMP_MAX_PRESETS; preset_idx++) {
+
+ /* Skip presets with IOR */
+ if ((preset_idx == 2) || (preset_idx == 5) || (preset_idx == 8) ||
+ (preset_idx == 11))
+ continue;
+
+ rval = bxe_get_preset_regs(sc, sc->grc_dump, preset_idx);
+
+ if (rval)
+ break;
+
+ size = bxe_get_preset_regs_len(sc, preset_idx) * (sizeof (uint32_t));
+
+ rval = copyout(sc->grc_dump, buf, size);
+
+ if (rval)
+ break;
+
+ dump->grcdump_dwords += (size / (sizeof (uint32_t)));
+
+ buf += size;
+ }
+
+ ecore_clear_blocks_parity(sc);
+ ecore_enable_blocks_parity(sc);
+
+ sc->grcdump_done = 1;
+ return(rval);
+}
+
+static int
+bxe_add_cdev(struct bxe_softc *sc)
+{
+ int max_preset_size;
+
+ max_preset_size = bxe_get_max_regs_len(sc) * (sizeof (uint32_t));
+
+ sc->grc_dump = malloc(max_preset_size, M_DEVBUF, M_NOWAIT);
+
+ if (sc->grc_dump == NULL)
+ return (-1);
+
+ sc->ioctl_dev = make_dev(&bxe_cdevsw,
+ sc->ifnet->if_dunit,
+ UID_ROOT,
+ GID_WHEEL,
+ 0600,
+ "%s",
+ if_name(sc->ifnet));
+
+ if (sc->ioctl_dev == NULL) {
+
+ free(sc->grc_dump, M_DEVBUF);
+
+ return (-1);
+ }
+
+ sc->ioctl_dev->si_drv1 = sc;
+
+ return (0);
+}
+
+static void
+bxe_del_cdev(struct bxe_softc *sc)
+{
+ if (sc->ioctl_dev != NULL)
+ destroy_dev(sc->ioctl_dev);
+
+ if (sc->grc_dump == NULL)
+ free(sc->grc_dump, M_DEVBUF);
+
+ return;
+}
+
+static int
+bxe_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
+ struct thread *td)
+{
+ struct bxe_softc *sc;
+ int rval = 0;
+ device_t pci_dev;
+ bxe_grcdump_t *dump = NULL;
+ int grc_dump_size;
+
+ if ((sc = (struct bxe_softc *)dev->si_drv1) == NULL)
+ return ENXIO;
+
+ pci_dev= sc->dev;
+
+ dump = (bxe_grcdump_t *)data;
+
+ switch(cmd) {
+
+ case BXE_GRC_DUMP_SIZE:
+ dump->pci_func = sc->pcie_func;
+ dump->grcdump_size = (bxe_get_total_regs_len32(sc) * sizeof(uint32_t)) +
+ sizeof(struct dump_header);
+ break;
+
+ case BXE_GRC_DUMP:
+
+ grc_dump_size = (bxe_get_total_regs_len32(sc) * sizeof(uint32_t)) +
+ sizeof(struct dump_header);
+
+ if ((sc->grc_dump == NULL) || (dump->grcdump == NULL) ||
+ (dump->grcdump_size < grc_dump_size)) {
+ rval = EINVAL;
+ break;
+ }
+
+ rval = bxe_grc_dump(sc, dump);
+
+ break;
+
+ default:
+ break;
+ }
+
+ return (rval);
+}
Modified: stable/9/sys/dev/bxe/bxe.h
==============================================================================
--- stable/9/sys/dev/bxe/bxe.h Tue Jan 12 23:44:03 2016 (r293790)
+++ stable/9/sys/dev/bxe/bxe.h Tue Jan 12 23:48:39 2016 (r293791)
@@ -1830,6 +1830,11 @@ struct bxe_softc {
uint8_t prio_to_cos[BXE_MAX_PRIORITY];
int panic;
+
+ struct cdev *ioctl_dev;
+ void *grc_dump;
+ int trigger_grcdump;
+ int grcdump_done;
}; /* struct bxe_softc */
/* IOCTL sub-commands for edebug and firmware upgrade */
@@ -2296,6 +2301,7 @@ void ecore_storm_memset_struct(struct bx
"ERROR: " format, \
## args); \
} \
+ sc->trigger_grcdump |= 0x1; \
} while(0)
#ifdef ECORE_STOP_ON_ERROR
Copied: stable/9/sys/dev/bxe/bxe_dump.h (from r292639, head/sys/dev/bxe/bxe_dump.h)
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ stable/9/sys/dev/bxe/bxe_dump.h Tue Jan 12 23:48:39 2016 (r293791, copy of r292639, head/sys/dev/bxe/bxe_dump.h)
@@ -0,0 +1,2231 @@
+/*
+ * Copyright (c) 2007-2015 QLogic Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef __BXE_DUMP_H__
+#define __BXE_DUMP_H__
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+/* WaitP Definitions */
+#define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
+#define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
+#define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
+#define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
+
+/* Possible Chips */
+#define DUMP_CHIP_E1 1
+#define DUMP_CHIP_E1H 2
+#define DUMP_CHIP_E2 4
+#define DUMP_CHIP_E3A0 8
+#define DUMP_CHIP_E3B0 16
+#define DUMP_PATH_0 512
+#define DUMP_PATH_1 1024
+#define NUM_PRESETS 13
+#define NUM_CHIPS 5
+
+struct dump_header {
+ uint32_t header_size; /* Size in DWORDs excluding this field */
+ uint32_t version;
+ uint32_t preset;
+ uint32_t dump_meta_data; /* OR of CHIP and PATH. */
+};
+
+#define BNX2X_DUMP_VERSION 0x61111111
+struct reg_addr {
+ uint32_t addr;
+ uint32_t size;
+ uint32_t chips;
+ uint32_t presets;
+};
+
+struct wreg_addr {
+ uint32_t addr;
+ uint32_t size;
+ uint32_t read_regs_count;
+ const uint32_t *read_regs;
+ uint32_t chips;
+ uint32_t presets;
+};
+
+#define PAGE_MODE_VALUES_E2 2
+#define PAGE_READ_REGS_E2 1
+#define PAGE_WRITE_REGS_E2 1
+static const uint32_t page_vals_e2[] = {0, 128};
+static const uint32_t page_write_regs_e2[] = {328476};
+static const struct reg_addr page_read_regs_e2[] = {
+ {0x58000, 4608, DUMP_CHIP_E2, 0x30}
+};
+
+#define PAGE_MODE_VALUES_E3 2
+#define PAGE_READ_REGS_E3 1
+#define PAGE_WRITE_REGS_E3 1
+static const uint32_t page_vals_e3[] = {0, 128};
+static const uint32_t page_write_regs_e3[] = {328476};
+static const struct reg_addr page_read_regs_e3[] = {
+ {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
+};
+
+static const struct reg_addr reg_addrs[] = {
+ { 0x2000, 1, 0x1f, 0xfff},
+ { 0x2004, 1, 0x1f, 0x1fff},
+ { 0x2008, 25, 0x1f, 0xfff},
+ { 0x206c, 1, 0x1f, 0x1fff},
+ { 0x2070, 313, 0x1f, 0xfff},
+ { 0x2800, 103, 0x1f, 0xfff},
+ { 0x3000, 287, 0x1f, 0xfff},
+ { 0x3800, 331, 0x1f, 0xfff},
+ { 0x8800, 6, 0x1f, 0x924},
+ { 0x8818, 1, 0x1e, 0x924},
+ { 0x9000, 4, 0x1c, 0x924},
+ { 0x9010, 7, 0x1c, 0xfff},
+ { 0x902c, 1, 0x1c, 0x924},
+ { 0x9030, 1, 0x1c, 0xfff},
+ { 0x9034, 13, 0x1c, 0x924},
+ { 0x9068, 16, 0x1c, 0xfff},
+ { 0x90a8, 98, 0x1c, 0x924},
+ { 0x9230, 2, 0x1c, 0xfff},
+ { 0x9238, 3, 0x1c, 0x924},
+ { 0x9244, 1, 0x1c, 0xfff},
+ { 0x9248, 1, 0x1c, 0x924},
+ { 0x924c, 1, 0x4, 0x924},
+ { 0x9250, 16, 0x1c, 0x924},
+ { 0x92a8, 2, 0x1c, 0x1fff},
+ { 0x92b4, 1, 0x1c, 0x1fff},
+ { 0x9400, 33, 0x1c, 0x924},
+ { 0x9484, 5, 0x18, 0x924},
+ { 0xa000, 27, 0x1f, 0x924},
+ { 0xa06c, 1, 0x3, 0x924},
+ { 0xa070, 2, 0x1f, 0x924},
+ { 0xa078, 1, 0x1f, 0x1fff},
+ { 0xa07c, 31, 0x1f, 0x924},
+ { 0xa0f8, 1, 0x1f, 0x1fff},
+ { 0xa0fc, 3, 0x1f, 0x924},
+ { 0xa108, 1, 0x1f, 0x1fff},
+ { 0xa10c, 3, 0x1f, 0x924},
+ { 0xa118, 1, 0x1f, 0x1fff},
+ { 0xa11c, 28, 0x1f, 0x924},
+ { 0xa18c, 4, 0x3, 0x924},
+ { 0xa19c, 3, 0x1f, 0x924},
+ { 0xa1a8, 1, 0x1f, 0x1fff},
+ { 0xa1ac, 3, 0x1f, 0x924},
+ { 0xa1b8, 1, 0x1f, 0x1fff},
+ { 0xa1bc, 54, 0x1f, 0x924},
+ { 0xa294, 2, 0x3, 0x924},
+ { 0xa29c, 2, 0x1f, 0x924},
+ { 0xa2a4, 2, 0x7, 0x924},
+ { 0xa2ac, 2, 0x1f, 0x924},
+ { 0xa2b4, 1, 0x1f, 0x1fff},
+ { 0xa2b8, 49, 0x1f, 0x924},
+ { 0xa38c, 2, 0x1f, 0x1fff},
+ { 0xa398, 1, 0x1f, 0x1fff},
+ { 0xa39c, 7, 0x1e, 0x924},
+ { 0xa3b8, 2, 0x18, 0x924},
+ { 0xa3c0, 1, 0x1e, 0x924},
+ { 0xa3c4, 1, 0x1e, 0xfff},
+ { 0xa3c8, 1, 0x1e, 0x924},
+ { 0xa3d0, 1, 0x1e, 0x924},
+ { 0xa3d8, 1, 0x1e, 0x924},
+ { 0xa3e0, 1, 0x1e, 0x924},
+ { 0xa3e8, 1, 0x1e, 0x924},
+ { 0xa3f0, 1, 0x1e, 0x924},
+ { 0xa3f8, 1, 0x1e, 0x924},
+ { 0xa400, 1, 0x1f, 0x924},
+ { 0xa404, 1, 0x1f, 0xfff},
+ { 0xa408, 2, 0x1f, 0x1fff},
+ { 0xa410, 7, 0x1f, 0x924},
+ { 0xa42c, 12, 0x1f, 0xfff},
+ { 0xa45c, 1, 0x1f, 0x924},
+ { 0xa460, 1, 0x1f, 0x1924},
+ { 0xa464, 15, 0x1f, 0x924},
+ { 0xa4a0, 1, 0x7, 0x924},
+ { 0xa4a4, 2, 0x1f, 0x924},
+ { 0xa4ac, 2, 0x3, 0x924},
+ { 0xa4b4, 1, 0x7, 0x924},
+ { 0xa4b8, 2, 0x3, 0x924},
+ { 0xa4c0, 3, 0x1f, 0x924},
+ { 0xa4cc, 5, 0x3, 0x924},
+ { 0xa4e0, 3, 0x1f, 0x924},
+ { 0xa4fc, 2, 0x1f, 0x924},
+ { 0xa504, 1, 0x3, 0x924},
+ { 0xa508, 3, 0x1f, 0x924},
+ { 0xa518, 1, 0x1f, 0x924},
+ { 0xa520, 1, 0x1f, 0x924},
+ { 0xa528, 1, 0x1f, 0x924},
+ { 0xa530, 1, 0x1f, 0x924},
+ { 0xa538, 1, 0x1f, 0x924},
+ { 0xa540, 1, 0x1f, 0x924},
+ { 0xa548, 1, 0x3, 0x924},
+ { 0xa550, 1, 0x3, 0x924},
+ { 0xa558, 1, 0x3, 0x924},
+ { 0xa560, 1, 0x3, 0x924},
+ { 0xa568, 1, 0x3, 0x924},
+ { 0xa570, 1, 0x1f, 0x924},
+ { 0xa580, 1, 0x1f, 0x1fff},
+ { 0xa590, 1, 0x1f, 0x1fff},
+ { 0xa5a0, 1, 0x7, 0x924},
+ { 0xa5c0, 1, 0x1f, 0x924},
+ { 0xa5e0, 1, 0x1e, 0x924},
+ { 0xa5e8, 1, 0x1e, 0x924},
+ { 0xa5f0, 1, 0x1e, 0x924},
+ { 0xa5f8, 1, 0x6, 0x924},
+ { 0xa5fc, 1, 0x1e, 0x924},
+ { 0xa600, 5, 0x1e, 0xfff},
+ { 0xa614, 1, 0x1e, 0x924},
+ { 0xa618, 1, 0x1e, 0xfff},
+ { 0xa61c, 1, 0x1e, 0x924},
+ { 0xa620, 6, 0x1c, 0x924},
+ { 0xa638, 20, 0x4, 0x924},
+ { 0xa688, 35, 0x1c, 0x924},
+ { 0xa714, 1, 0x1c, 0xfff},
+ { 0xa718, 2, 0x1c, 0x924},
+ { 0xa720, 1, 0x1c, 0xfff},
+ { 0xa724, 3, 0x1c, 0x924},
+ { 0xa730, 1, 0x4, 0x924},
+ { 0xa734, 2, 0x1c, 0x924},
+ { 0xa73c, 4, 0x4, 0x924},
+ { 0xa74c, 1, 0x1c, 0x924},
+ { 0xa750, 1, 0x1c, 0xfff},
+ { 0xa754, 3, 0x1c, 0x924},
+ { 0xa760, 5, 0x4, 0x924},
+ { 0xa774, 7, 0x1c, 0x924},
+ { 0xa790, 15, 0x4, 0x924},
+ { 0xa7cc, 4, 0x1c, 0x924},
+ { 0xa7e0, 6, 0x18, 0x924},
+ { 0xa800, 18, 0x4, 0x924},
+ { 0xa848, 33, 0x1c, 0x924},
+ { 0xa8cc, 2, 0x18, 0x924},
+ { 0xa8d4, 4, 0x1c, 0x924},
+ { 0xa8e4, 1, 0x18, 0x924},
+ { 0xa8e8, 1, 0x1c, 0x924},
+ { 0xa8f0, 1, 0x1c, 0x924},
+ { 0xa8f8, 30, 0x18, 0x924},
+ { 0xa974, 73, 0x18, 0x924},
+ { 0xac30, 1, 0x18, 0x924},
+ { 0xac40, 1, 0x18, 0x924},
+ { 0xac50, 1, 0x18, 0x924},
+ { 0xac60, 1, 0x10, 0x924},
+ { 0x10000, 9, 0x1f, 0x924},
+ { 0x10024, 1, 0x7, 0x924},
+ { 0x10028, 5, 0x1f, 0x924},
+ { 0x1003c, 6, 0x7, 0x924},
+ { 0x10054, 20, 0x1f, 0x924},
+ { 0x100a4, 4, 0x7, 0x924},
+ { 0x100b4, 11, 0x1f, 0x924},
+ { 0x100e0, 4, 0x7, 0x924},
+ { 0x100f0, 8, 0x1f, 0x924},
+ { 0x10110, 6, 0x7, 0x924},
+ { 0x10128, 110, 0x1f, 0x924},
+ { 0x102e0, 4, 0x7, 0x924},
+ { 0x102f0, 18, 0x1f, 0x924},
+ { 0x10338, 20, 0x7, 0x924},
+ { 0x10388, 10, 0x1f, 0x924},
+ { 0x103d0, 2, 0x3, 0x1fff},
+ { 0x103dc, 1, 0x3, 0x1fff},
+ { 0x10400, 6, 0x7, 0x924},
+ { 0x10418, 1, 0x1f, 0xfff},
+ { 0x1041c, 1, 0x1f, 0x924},
+ { 0x10420, 1, 0x1f, 0xfff},
+ { 0x10424, 1, 0x1f, 0x924},
+ { 0x10428, 1, 0x1f, 0xfff},
+ { 0x1042c, 1, 0x1f, 0x924},
+ { 0x10430, 10, 0x7, 0x924},
+ { 0x10458, 2, 0x1f, 0x924},
+ { 0x10460, 1, 0x1f, 0xfff},
+ { 0x10464, 4, 0x1f, 0x924},
+ { 0x10474, 1, 0x1f, 0xfff},
+ { 0x10478, 14, 0x1f, 0x924},
+ { 0x104b0, 12, 0x7, 0x924},
+ { 0x104e0, 1, 0x1f, 0xfff},
+ { 0x104e8, 1, 0x1f, 0x924},
+ { 0x104ec, 1, 0x1f, 0xfff},
+ { 0x104f4, 1, 0x1f, 0x924},
+ { 0x104f8, 1, 0x1f, 0xfff},
+ { 0x10500, 2, 0x1f, 0x924},
+ { 0x10508, 1, 0x1f, 0xfff},
+ { 0x1050c, 9, 0x1f, 0x924},
+ { 0x10530, 1, 0x1f, 0xfff},
+ { 0x10534, 1, 0x1f, 0x924},
+ { 0x10538, 1, 0x1f, 0xfff},
+ { 0x1053c, 3, 0x1f, 0x924},
+ { 0x10548, 1, 0x1f, 0xfff},
+ { 0x1054c, 3, 0x1f, 0x924},
+ { 0x10558, 1, 0x1f, 0xfff},
+ { 0x1055c, 123, 0x1f, 0x924},
+ { 0x10750, 2, 0x7, 0x924},
+ { 0x10760, 2, 0x7, 0x924},
+ { 0x10770, 2, 0x7, 0x924},
+ { 0x10780, 2, 0x7, 0x924},
+ { 0x10790, 2, 0x1f, 0x924},
+ { 0x107a0, 2, 0x7, 0x924},
+ { 0x107b0, 2, 0x7, 0x924},
+ { 0x107c0, 2, 0x7, 0x924},
+ { 0x107d0, 2, 0x7, 0x924},
+ { 0x107e0, 2, 0x1f, 0x924},
+ { 0x10880, 2, 0x1f, 0x924},
+ { 0x10900, 2, 0x1f, 0x924},
+ { 0x16000, 1, 0x6, 0x924},
+ { 0x16004, 25, 0x1e, 0x924},
+ { 0x16070, 8, 0x1e, 0x924},
+ { 0x16090, 4, 0xe, 0x924},
+ { 0x160a0, 6, 0x1e, 0x924},
+ { 0x160c0, 7, 0x1e, 0x924},
+ { 0x160dc, 2, 0x6, 0x924},
+ { 0x160e4, 6, 0x1e, 0x924},
+ { 0x160fc, 4, 0x1e, 0x1fff},
+ { 0x1610c, 2, 0x6, 0x924},
+ { 0x16114, 6, 0x1e, 0x924},
+ { 0x16140, 48, 0x1e, 0x1fff},
+ { 0x16204, 5, 0x1e, 0x924},
+ { 0x18000, 1, 0x1e, 0x924},
+ { 0x18008, 1, 0x1e, 0x924},
+ { 0x18010, 35, 0x1c, 0x924},
+ { 0x180a4, 2, 0x1c, 0x924},
+ { 0x180c0, 9, 0x1c, 0x924},
+ { 0x180e4, 1, 0xc, 0x924},
+ { 0x180e8, 2, 0x1c, 0x924},
+ { 0x180f0, 1, 0xc, 0x924},
+ { 0x180f4, 79, 0x1c, 0x924},
+ { 0x18230, 1, 0xc, 0x924},
+ { 0x18234, 2, 0x1c, 0x924},
+ { 0x1823c, 1, 0xc, 0x924},
+ { 0x18240, 13, 0x1c, 0x924},
+ { 0x18274, 1, 0x4, 0x924},
+ { 0x18278, 12, 0x1c, 0x924},
+ { 0x182a8, 1, 0x1c, 0xfff},
+ { 0x182ac, 3, 0x1c, 0x924},
+ { 0x182b8, 1, 0x1c, 0xfff},
+ { 0x182bc, 19, 0x1c, 0x924},
+ { 0x18308, 1, 0x1c, 0xfff},
+ { 0x1830c, 3, 0x1c, 0x924},
+ { 0x18318, 1, 0x1c, 0xfff},
+ { 0x1831c, 7, 0x1c, 0x924},
+ { 0x18338, 1, 0x1c, 0xfff},
+ { 0x1833c, 3, 0x1c, 0x924},
+ { 0x18348, 1, 0x1c, 0xfff},
+ { 0x1834c, 28, 0x1c, 0x924},
+ { 0x183bc, 2, 0x1c, 0x1fff},
+ { 0x183c8, 3, 0x1c, 0x1fff},
+ { 0x183d8, 1, 0x1c, 0x1fff},
+ { 0x18440, 48, 0x1c, 0x1fff},
+ { 0x18500, 15, 0x1c, 0x924},
+ { 0x18570, 1, 0x18, 0xfff},
+ { 0x18574, 1, 0x18, 0x924},
+ { 0x18578, 1, 0x18, 0xfff},
+ { 0x1857c, 4, 0x18, 0x924},
+ { 0x1858c, 1, 0x18, 0xfff},
+ { 0x18590, 1, 0x18, 0x924},
+ { 0x18594, 1, 0x18, 0xfff},
+ { 0x18598, 32, 0x18, 0x924},
+ { 0x18618, 5, 0x10, 0x924},
+ { 0x1862c, 4, 0x10, 0xfff},
+ { 0x1863c, 16, 0x10, 0x924},
+ { 0x18680, 44, 0x10, 0x924},
+ { 0x18748, 12, 0x10, 0x924},
+ { 0x18788, 1, 0x10, 0x924},
+ { 0x1879c, 6, 0x10, 0x924},
+ { 0x187c4, 51, 0x10, 0x924},
+ { 0x18a00, 48, 0x10, 0x924},
+ { 0x20000, 24, 0x1f, 0x924},
+ { 0x20060, 8, 0x1f, 0x9e4},
+ { 0x20080, 94, 0x1f, 0x924},
+ { 0x201f8, 1, 0x3, 0x924},
+ { 0x201fc, 1, 0x1f, 0x924},
+ { 0x20200, 1, 0x3, 0x924},
+ { 0x20204, 1, 0x1f, 0x924},
+ { 0x20208, 1, 0x3, 0x924},
+ { 0x2020c, 4, 0x1f, 0x924},
+ { 0x2021c, 11, 0x1f, 0xfff},
+ { 0x20248, 24, 0x1f, 0x924},
+ { 0x202b8, 2, 0x1f, 0x1fff},
+ { 0x202c4, 1, 0x1f, 0x1fff},
+ { 0x202c8, 1, 0x1c, 0x924},
+ { 0x202d8, 4, 0x1c, 0x924},
+ { 0x202f0, 1, 0x10, 0x924},
+ { 0x20400, 1, 0x1f, 0x924},
+ { 0x20404, 1, 0x1f, 0xfff},
+ { 0x2040c, 2, 0x1f, 0xfff},
+ { 0x20414, 2, 0x1f, 0x924},
+ { 0x2041c, 2, 0x1f, 0xfff},
+ { 0x20424, 2, 0x1f, 0x924},
+ { 0x2042c, 18, 0x1e, 0x924},
+ { 0x20480, 1, 0x1f, 0x924},
+ { 0x20500, 1, 0x1f, 0x924},
+ { 0x20600, 1, 0x1f, 0x924},
+ { 0x28000, 1, 0x1f, 0x9e4},
+ { 0x28004, 255, 0x1f, 0x180},
+ { 0x28400, 1, 0x1f, 0x1c0},
+ { 0x28404, 255, 0x1f, 0x180},
+ { 0x28800, 1, 0x1f, 0x1c0},
+ { 0x28804, 255, 0x1f, 0x180},
+ { 0x28c00, 1, 0x1f, 0x1c0},
+ { 0x28c04, 255, 0x1f, 0x180},
+ { 0x29000, 1, 0x1f, 0x1c0},
+ { 0x29004, 255, 0x1f, 0x180},
+ { 0x29400, 1, 0x1f, 0x1c0},
+ { 0x29404, 255, 0x1f, 0x180},
+ { 0x29800, 1, 0x1f, 0x1c0},
+ { 0x29804, 255, 0x1f, 0x180},
+ { 0x29c00, 1, 0x1f, 0x1c0},
+ { 0x29c04, 255, 0x1f, 0x180},
+ { 0x2a000, 1, 0x1f, 0x1c0},
+ { 0x2a004, 255, 0x1f, 0x180},
+ { 0x2a400, 1, 0x1f, 0x1c0},
+ { 0x2a404, 255, 0x1f, 0x180},
+ { 0x2a800, 1, 0x1f, 0x1c0},
+ { 0x2a804, 255, 0x1f, 0x180},
+ { 0x2ac00, 1, 0x1f, 0x1c0},
+ { 0x2ac04, 255, 0x1f, 0x180},
+ { 0x2b000, 1, 0x1f, 0x1c0},
+ { 0x2b004, 255, 0x1f, 0x180},
+ { 0x2b400, 1, 0x1f, 0x1c0},
+ { 0x2b404, 255, 0x1f, 0x180},
+ { 0x2b800, 1, 0x1f, 0x1c0},
+ { 0x2b804, 255, 0x1f, 0x180},
+ { 0x2bc00, 1, 0x1f, 0x1c0},
+ { 0x2bc04, 255, 0x1f, 0x180},
+ { 0x2c000, 1, 0x1f, 0x1c0},
+ { 0x2c004, 255, 0x1f, 0x180},
+ { 0x2c400, 1, 0x1f, 0x1c0},
+ { 0x2c404, 255, 0x1f, 0x180},
+ { 0x2c800, 1, 0x1f, 0x1c0},
+ { 0x2c804, 255, 0x1f, 0x180},
+ { 0x2cc00, 1, 0x1f, 0x1c0},
+ { 0x2cc04, 255, 0x1f, 0x180},
+ { 0x2d000, 1, 0x1f, 0x1c0},
+ { 0x2d004, 255, 0x1f, 0x180},
+ { 0x2d400, 1, 0x1f, 0x1c0},
+ { 0x2d404, 255, 0x1f, 0x180},
+ { 0x2d800, 1, 0x1f, 0x1c0},
+ { 0x2d804, 255, 0x1f, 0x180},
+ { 0x2dc00, 1, 0x1f, 0x1c0},
+ { 0x2dc04, 255, 0x1f, 0x180},
+ { 0x2e000, 1, 0x1f, 0x1c0},
+ { 0x2e004, 255, 0x1f, 0x180},
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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