svn commit: r295122 - in head/sys/arm: arm include
Michal Meloun
mmel at FreeBSD.org
Mon Feb 1 13:13:56 UTC 2016
Author: mmel
Date: Mon Feb 1 13:13:53 2016
New Revision: 295122
URL: https://svnweb.freebsd.org/changeset/base/295122
Log:
ARM: Remove never used cpu_tlb_flushI and cpu_tlb_flushI_SE() functions
and their implementations.
Modified:
head/sys/arm/arm/cpufunc.c
head/sys/arm/arm/cpufunc_asm_arm10.S
head/sys/arm/arm/cpufunc_asm_arm11.S
head/sys/arm/arm/cpufunc_asm_armv4.S
head/sys/arm/arm/cpufunc_asm_fa526.S
head/sys/arm/include/cpufunc.h
Modified: head/sys/arm/arm/cpufunc.c
==============================================================================
--- head/sys/arm/arm/cpufunc.c Mon Feb 1 08:06:17 2016 (r295121)
+++ head/sys/arm/arm/cpufunc.c Mon Feb 1 13:13:53 2016 (r295122)
@@ -116,8 +116,6 @@ struct cpu_functions arm9_cpufuncs = {
armv4_tlb_flushID, /* tlb_flushID */
arm9_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
armv4_tlb_flushD, /* tlb_flushD */
armv4_tlb_flushD_SE, /* tlb_flushD_SE */
@@ -171,8 +169,6 @@ struct cpu_functions armv5_ec_cpufuncs =
armv4_tlb_flushID, /* tlb_flushID */
arm10_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- arm10_tlb_flushI_SE, /* tlb_flushI_SE */
armv4_tlb_flushD, /* tlb_flushD */
armv4_tlb_flushD_SE, /* tlb_flushD_SE */
@@ -280,8 +276,6 @@ struct cpu_functions pj4bv7_cpufuncs = {
armv7_tlb_flushID, /* tlb_flushID */
armv7_tlb_flushID_SE, /* tlb_flushID_SE */
- armv7_tlb_flushID, /* tlb_flushI */
- armv7_tlb_flushID_SE, /* tlb_flushI_SE */
armv7_tlb_flushID, /* tlb_flushD */
armv7_tlb_flushID_SE, /* tlb_flushD_SE */
@@ -336,8 +330,6 @@ struct cpu_functions xscale_cpufuncs = {
armv4_tlb_flushID, /* tlb_flushID */
xscale_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
armv4_tlb_flushD, /* tlb_flushD */
armv4_tlb_flushD_SE, /* tlb_flushD_SE */
@@ -392,8 +384,6 @@ struct cpu_functions xscalec3_cpufuncs =
armv4_tlb_flushID, /* tlb_flushID */
xscale_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
armv4_tlb_flushD, /* tlb_flushD */
armv4_tlb_flushD_SE, /* tlb_flushD_SE */
@@ -447,8 +437,6 @@ struct cpu_functions fa526_cpufuncs = {
armv4_tlb_flushID, /* tlb_flushID */
fa526_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- fa526_tlb_flushI_SE, /* tlb_flushI_SE */
armv4_tlb_flushD, /* tlb_flushD */
armv4_tlb_flushD_SE, /* tlb_flushD_SE */
@@ -502,8 +490,6 @@ struct cpu_functions arm1176_cpufuncs =
arm11_tlb_flushID, /* tlb_flushID */
arm11_tlb_flushID_SE, /* tlb_flushID_SE */
- arm11_tlb_flushI, /* tlb_flushI */
- arm11_tlb_flushI_SE, /* tlb_flushI_SE */
arm11_tlb_flushD, /* tlb_flushD */
arm11_tlb_flushD_SE, /* tlb_flushD_SE */
@@ -561,8 +547,6 @@ struct cpu_functions cortexa_cpufuncs =
armv7_tlb_flushID, /* tlb_flushID */
armv7_tlb_flushID_SE, /* tlb_flushID_SE */
- armv7_tlb_flushID, /* tlb_flushI */
- armv7_tlb_flushID_SE, /* tlb_flushI_SE */
armv7_tlb_flushID, /* tlb_flushD */
armv7_tlb_flushID_SE, /* tlb_flushD_SE */
Modified: head/sys/arm/arm/cpufunc_asm_arm10.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_arm10.S Mon Feb 1 08:06:17 2016 (r295121)
+++ head/sys/arm/arm/cpufunc_asm_arm10.S Mon Feb 1 13:13:53 2016 (r295122)
@@ -44,11 +44,6 @@ ENTRY(arm10_tlb_flushID_SE)
bx lr
END(arm10_tlb_flushID_SE)
-ENTRY(arm10_tlb_flushI_SE)
- mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
- bx lr
-END(arm10_tlb_flushI_SE)
-
/*
* Context switch.
Modified: head/sys/arm/arm/cpufunc_asm_arm11.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_arm11.S Mon Feb 1 08:06:17 2016 (r295121)
+++ head/sys/arm/arm/cpufunc_asm_arm11.S Mon Feb 1 13:13:53 2016 (r295122)
@@ -47,12 +47,6 @@ ENTRY(arm11_tlb_flushID_SE)
RET
END(arm11_tlb_flushID_SE)
-ENTRY(arm11_tlb_flushI_SE)
- mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- RET
-END(arm11_tlb_flushI_SE)
-
/*
* Context switch.
*
@@ -87,12 +81,6 @@ ENTRY(arm11_tlb_flushID)
mov pc, lr
END(arm11_tlb_flushID)
-ENTRY(arm11_tlb_flushI)
- mcr p15, 0, r0, c8, c5, 0 /* flush I tlb */
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mov pc, lr
-END(arm11_tlb_flushI)
-
ENTRY(arm11_tlb_flushD)
mcr p15, 0, r0, c8, c6, 0 /* flush D tlb */
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
Modified: head/sys/arm/arm/cpufunc_asm_armv4.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_armv4.S Mon Feb 1 08:06:17 2016 (r295121)
+++ head/sys/arm/arm/cpufunc_asm_armv4.S Mon Feb 1 13:13:53 2016 (r295122)
@@ -48,11 +48,6 @@ ENTRY(armv4_tlb_flushID)
RET
END(armv4_tlb_flushID)
-ENTRY(armv4_tlb_flushI)
- mcr p15, 0, r0, c8, c5, 0 /* flush I tlb */
- RET
-END(armv4_tlb_flushI)
-
ENTRY(armv4_tlb_flushD)
mcr p15, 0, r0, c8, c6, 0 /* flush D tlb */
RET
Modified: head/sys/arm/arm/cpufunc_asm_fa526.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_fa526.S Mon Feb 1 08:06:17 2016 (r295121)
+++ head/sys/arm/arm/cpufunc_asm_fa526.S Mon Feb 1 13:13:53 2016 (r295122)
@@ -64,14 +64,6 @@ ENTRY(fa526_tlb_flushID_SE)
mov pc, lr
END(fa526_tlb_flushID_SE)
-/*
- * TLB functions
- */
-ENTRY(fa526_tlb_flushI_SE)
- mcr p15, 0, r0, c8, c5, 1 /* flush Itlb single entry */
- mov pc, lr
-END(fa526_tlb_flushI_SE)
-
ENTRY(fa526_cpu_sleep)
mov r0, #0
/* nop
Modified: head/sys/arm/include/cpufunc.h
==============================================================================
--- head/sys/arm/include/cpufunc.h Mon Feb 1 08:06:17 2016 (r295121)
+++ head/sys/arm/include/cpufunc.h Mon Feb 1 13:13:53 2016 (r295122)
@@ -71,8 +71,6 @@ struct cpu_functions {
void (*cf_tlb_flushID) (void);
void (*cf_tlb_flushID_SE) (u_int va);
- void (*cf_tlb_flushI) (void);
- void (*cf_tlb_flushI_SE) (u_int va);
void (*cf_tlb_flushD) (void);
void (*cf_tlb_flushD_SE) (u_int va);
@@ -173,8 +171,6 @@ extern u_int cputype;
#define cpu_tlb_flushID() cpufuncs.cf_tlb_flushID()
#define cpu_tlb_flushID_SE(e) cpufuncs.cf_tlb_flushID_SE(e)
-#define cpu_tlb_flushI() cpufuncs.cf_tlb_flushI()
-#define cpu_tlb_flushI_SE(e) cpufuncs.cf_tlb_flushI_SE(e)
#define cpu_tlb_flushD() cpufuncs.cf_tlb_flushD()
#define cpu_tlb_flushD_SE(e) cpufuncs.cf_tlb_flushD_SE(e)
@@ -218,7 +214,6 @@ void fa526_setup (void);
void fa526_setttb (u_int ttb);
void fa526_context_switch (void);
void fa526_cpu_sleep (int);
-void fa526_tlb_flushI_SE (u_int);
void fa526_tlb_flushID_SE (u_int);
void fa526_flush_prefetchbuf (void);
@@ -261,7 +256,6 @@ extern unsigned arm9_dcache_index_inc;
#if defined(CPU_ARM9E)
void arm10_tlb_flushID_SE (u_int);
-void arm10_tlb_flushI_SE (u_int);
void arm10_context_switch (void);
@@ -316,8 +310,6 @@ void pj4bv7_setup (void);
#if defined(CPU_ARM1176)
void arm11_tlb_flushID (void);
void arm11_tlb_flushID_SE (u_int);
-void arm11_tlb_flushI (void);
-void arm11_tlb_flushI_SE (u_int);
void arm11_tlb_flushD (void);
void arm11_tlb_flushD_SE (u_int va);
@@ -364,7 +356,6 @@ void armv5_ec_idcache_wbinv_range(vm_off
defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)
void armv4_tlb_flushID (void);
-void armv4_tlb_flushI (void);
void armv4_tlb_flushD (void);
void armv4_tlb_flushD_SE (u_int va);
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