svn commit: r287510 - in vendor/llvm/dist: . autoconf cmake/modules docs docs/Frontend docs/TableGen docs/tutorial include/llvm-c include/llvm/ADT include/llvm/CodeGen include/llvm/Target lib/Analy...
Dimitry Andric
dim at FreeBSD.org
Sun Sep 6 18:34:46 UTC 2015
Author: dim
Date: Sun Sep 6 18:34:38 2015
New Revision: 287510
URL: https://svnweb.freebsd.org/changeset/base/287510
Log:
Import llvm 3.7.0 release (r246257).
Added:
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/fastcc-miss.ll
vendor/llvm/dist/test/CodeGen/PowerPC/fp2int2fp-ppcfp128.ll
vendor/llvm/dist/test/CodeGen/PowerPC/pr24216.ll
vendor/llvm/dist/test/CodeGen/PowerPC/xvcmpeqdp-v2f64.ll
vendor/llvm/dist/test/CodeGen/SystemZ/args-07.ll
vendor/llvm/dist/test/CodeGen/SystemZ/args-08.ll
vendor/llvm/dist/test/CodeGen/SystemZ/vec-args-06.ll
vendor/llvm/dist/test/CodeGen/SystemZ/vec-args-07.ll
vendor/llvm/dist/test/CodeGen/X86/machine-trace-metrics-crash.ll
vendor/llvm/dist/test/MC/Disassembler/PowerPC/ppc64le-encoding.txt (contents, props changed)
vendor/llvm/dist/test/Transforms/GVN/pr24397.ll
vendor/llvm/dist/test/Transforms/InstCombine/pr24354.ll
vendor/llvm/dist/test/Transforms/Scalarizer/cache-bug.ll
Deleted:
vendor/llvm/dist/test/Analysis/BasicAA/zext.ll
Modified:
vendor/llvm/dist/CMakeLists.txt
vendor/llvm/dist/CREDITS.TXT
vendor/llvm/dist/Makefile.config.in
vendor/llvm/dist/autoconf/configure.ac
vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake
vendor/llvm/dist/configure
vendor/llvm/dist/docs/Atomics.rst
vendor/llvm/dist/docs/CMake.rst
vendor/llvm/dist/docs/CMakeLists.txt
vendor/llvm/dist/docs/CodeGenerator.rst
vendor/llvm/dist/docs/CodingStandards.rst
vendor/llvm/dist/docs/DeveloperPolicy.rst
vendor/llvm/dist/docs/ExtendingLLVM.rst
vendor/llvm/dist/docs/Frontend/PerformanceTips.rst
vendor/llvm/dist/docs/GettingStarted.rst
vendor/llvm/dist/docs/LangRef.rst
vendor/llvm/dist/docs/Makefile
vendor/llvm/dist/docs/Phabricator.rst
vendor/llvm/dist/docs/Projects.rst
vendor/llvm/dist/docs/ReleaseNotes.rst
vendor/llvm/dist/docs/Statepoints.rst
vendor/llvm/dist/docs/TableGen/LangIntro.rst
vendor/llvm/dist/docs/TableGen/LangRef.rst
vendor/llvm/dist/docs/conf.py
vendor/llvm/dist/docs/doxygen.cfg.in
vendor/llvm/dist/docs/index.rst
vendor/llvm/dist/docs/tutorial/LangImpl9.rst
vendor/llvm/dist/docs/tutorial/OCamlLangImpl8.rst
vendor/llvm/dist/include/llvm-c/TargetMachine.h
vendor/llvm/dist/include/llvm/ADT/SmallVector.h
vendor/llvm/dist/include/llvm/ADT/StringMap.h
vendor/llvm/dist/include/llvm/CodeGen/LiveRegMatrix.h
vendor/llvm/dist/include/llvm/CodeGen/MachineRegisterInfo.h
vendor/llvm/dist/include/llvm/Target/TargetMachine.h
vendor/llvm/dist/lib/Analysis/BasicAliasAnalysis.cpp
vendor/llvm/dist/lib/Analysis/IPA/GlobalsModRef.cpp
vendor/llvm/dist/lib/Analysis/InstructionSimplify.cpp
vendor/llvm/dist/lib/Analysis/PHITransAddr.cpp
vendor/llvm/dist/lib/Analysis/VectorUtils.cpp
vendor/llvm/dist/lib/CodeGen/ExecutionDepsFix.cpp
vendor/llvm/dist/lib/CodeGen/LiveRegMatrix.cpp
vendor/llvm/dist/lib/CodeGen/MachineRegisterInfo.cpp
vendor/llvm/dist/lib/CodeGen/MachineTraceMetrics.cpp
vendor/llvm/dist/lib/CodeGen/PrologEpilogInserter.cpp
vendor/llvm/dist/lib/CodeGen/RegAllocFast.cpp
vendor/llvm/dist/lib/CodeGen/RegisterCoalescer.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
vendor/llvm/dist/lib/CodeGen/VirtRegMap.cpp
vendor/llvm/dist/lib/ExecutionEngine/ExecutionEngine.cpp
vendor/llvm/dist/lib/ExecutionEngine/MCJIT/MCJIT.cpp
vendor/llvm/dist/lib/ExecutionEngine/RuntimeDyld/RTDyldMemoryManager.cpp
vendor/llvm/dist/lib/IR/Type.cpp
vendor/llvm/dist/lib/Support/MemoryBuffer.cpp
vendor/llvm/dist/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
vendor/llvm/dist/lib/Target/AArch64/AArch64FrameLowering.cpp
vendor/llvm/dist/lib/Target/AMDGPU/AMDGPU.td
vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUSubtarget.h
vendor/llvm/dist/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
vendor/llvm/dist/lib/Target/AMDGPU/Processors.td
vendor/llvm/dist/lib/Target/AMDGPU/SIISelLowering.cpp
vendor/llvm/dist/lib/Target/AMDGPU/SIISelLowering.h
vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.td
vendor/llvm/dist/lib/Target/AMDGPU/SIInstructions.td
vendor/llvm/dist/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
vendor/llvm/dist/lib/Target/AMDGPU/SIPrepareScratchRegs.cpp
vendor/llvm/dist/lib/Target/AMDGPU/SIRegisterInfo.cpp
vendor/llvm/dist/lib/Target/AMDGPU/VIInstructions.td
vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp
vendor/llvm/dist/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
vendor/llvm/dist/lib/Target/ARM/README.txt
vendor/llvm/dist/lib/Target/ARM/Thumb1InstrInfo.cpp
vendor/llvm/dist/lib/Target/Hexagon/HexagonFrameLowering.cpp
vendor/llvm/dist/lib/Target/Mips/Mips64InstrInfo.td
vendor/llvm/dist/lib/Target/Mips/MipsFastISel.cpp
vendor/llvm/dist/lib/Target/Mips/MipsISelLowering.cpp
vendor/llvm/dist/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCAsmPrinter.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCFrameLowering.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.cpp
vendor/llvm/dist/lib/Target/README.txt
vendor/llvm/dist/lib/Target/Sparc/SparcFrameLowering.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZCallingConv.td
vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.h
vendor/llvm/dist/lib/Target/X86/AsmParser/X86AsmParser.cpp
vendor/llvm/dist/lib/Target/X86/X86FloatingPoint.cpp
vendor/llvm/dist/lib/Target/X86/X86FrameLowering.cpp
vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp
vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp
vendor/llvm/dist/lib/Target/X86/X86InstrSSE.td
vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp
vendor/llvm/dist/lib/Transforms/Scalar/EarlyCSE.cpp
vendor/llvm/dist/lib/Transforms/Scalar/SROA.cpp
vendor/llvm/dist/lib/Transforms/Scalar/Scalarizer.cpp
vendor/llvm/dist/test/Analysis/BasicAA/gep-alias.ll
vendor/llvm/dist/test/Analysis/BasicAA/phi-aa.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/global_atomics.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/gv-const-addrspace.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.AMDGPU.fract.f64.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/private-memory.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/scratch-buffer.ll
vendor/llvm/dist/test/CodeGen/AMDGPU/smrd.ll
vendor/llvm/dist/test/CodeGen/ARM/ldrd.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/br1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/bswap1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/callabi.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/constexpr-address.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/div1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/fpext.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/fpintconv.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/fptrunc.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/icmpa.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/loadstore2.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/loadstoreconv.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/loadstrconst.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/logopm.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/memtest1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/mul1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/nullvoid.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/overflt.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/rem1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/retabi.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/sel1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/shftopm.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/shift.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/simplestore.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/simplestorefp1.ll
vendor/llvm/dist/test/CodeGen/Mips/Fast-ISel/simplestorei.ll
vendor/llvm/dist/test/CodeGen/Mips/delay-slot-kill.ll
vendor/llvm/dist/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
vendor/llvm/dist/test/CodeGen/Mips/llvm-ir/and.ll
vendor/llvm/dist/test/CodeGen/Mips/llvm-ir/or.ll
vendor/llvm/dist/test/CodeGen/Mips/llvm-ir/xor.ll
vendor/llvm/dist/test/CodeGen/PowerPC/ppc64-patchpoint.ll
vendor/llvm/dist/test/CodeGen/PowerPC/vec_shuffle_le.ll
vendor/llvm/dist/test/CodeGen/PowerPC/vsx.ll
vendor/llvm/dist/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
vendor/llvm/dist/test/CodeGen/SystemZ/args-04.ll
vendor/llvm/dist/test/CodeGen/X86/fdiv-combine.ll
vendor/llvm/dist/test/CodeGen/X86/pr2656.ll
vendor/llvm/dist/test/CodeGen/X86/sse-fcopysign.ll
vendor/llvm/dist/test/CodeGen/X86/vec_fabs.ll
vendor/llvm/dist/test/DebugInfo/Mips/delay-slot.ll
vendor/llvm/dist/test/MC/AMDGPU/vopc.s
vendor/llvm/dist/test/MC/X86/intel-syntax.s
vendor/llvm/dist/test/Object/archive-extract.test
vendor/llvm/dist/test/Transforms/InstCombine/vector-casts.ll
vendor/llvm/dist/test/Transforms/InstSimplify/2011-09-05-InsertExtractValue.ll
vendor/llvm/dist/test/Transforms/SROA/basictest.ll
vendor/llvm/dist/test/Transforms/SROA/big-endian.ll
vendor/llvm/dist/test/Transforms/SROA/phi-and-select.ll
vendor/llvm/dist/tools/llvm-config/CMakeLists.txt
vendor/llvm/dist/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
vendor/llvm/dist/utils/emacs/README
vendor/llvm/dist/utils/jedit/README
vendor/llvm/dist/utils/kate/README
vendor/llvm/dist/utils/release/export.sh
vendor/llvm/dist/utils/release/tag.sh
vendor/llvm/dist/utils/release/test-release.sh
vendor/llvm/dist/utils/unittest/googletest/README.LLVM
vendor/llvm/dist/utils/vim/README
Modified: vendor/llvm/dist/CMakeLists.txt
==============================================================================
--- vendor/llvm/dist/CMakeLists.txt Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/CMakeLists.txt Sun Sep 6 18:34:38 2015 (r287510)
@@ -61,7 +61,7 @@ set(CMAKE_MODULE_PATH
set(LLVM_VERSION_MAJOR 3)
set(LLVM_VERSION_MINOR 7)
set(LLVM_VERSION_PATCH 0)
-set(LLVM_VERSION_SUFFIX svn)
+set(LLVM_VERSION_SUFFIX "")
if (NOT PACKAGE_VERSION)
set(PACKAGE_VERSION
@@ -518,7 +518,7 @@ if (APPLE)
else(UNIX)
if(NOT DEFINED CMAKE_INSTALL_RPATH)
set(CMAKE_INSTALL_RPATH "\$ORIGIN/../lib${LLVM_LIBDIR_SUFFIX}")
- if (${CMAKE_SYSTEM_NAME} MATCHES FreeBSD)
+ if(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)")
set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -Wl,-z,origin")
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Wl,-z,origin")
endif()
@@ -544,12 +544,12 @@ if(LLVM_USE_HOST_TOOLS)
include(CrossCompile)
endif(LLVM_USE_HOST_TOOLS)
-if( ${CMAKE_SYSTEM_NAME} MATCHES FreeBSD )
+if(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)")
# On FreeBSD, /usr/local/* is not used by default. In order to build LLVM
# with libxml2, iconv.h, etc., we must add /usr/local paths.
include_directories("/usr/local/include")
link_directories("/usr/local/lib")
-endif( ${CMAKE_SYSTEM_NAME} MATCHES FreeBSD )
+endif(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)")
if( ${CMAKE_SYSTEM_NAME} MATCHES SunOS )
SET(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -include llvm/Support/Solaris.h")
Modified: vendor/llvm/dist/CREDITS.TXT
==============================================================================
--- vendor/llvm/dist/CREDITS.TXT Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/CREDITS.TXT Sun Sep 6 18:34:38 2015 (r287510)
@@ -465,3 +465,47 @@ N: Bob Wilson
E: bob.wilson at acm.org
D: Advanced SIMD (NEON) support in the ARM backend.
+N: Alexey Bataev
+E: a.bataev at hotmail.com
+D: Clang OpenMP implementation
+
+N: Andrey Bokhanko
+E: andreybokhanko at gmail.com
+D: Clang OpenMP implementation
+
+N: Carlo Bertolli
+E: cbertol at us.ibm.com
+D: Clang OpenMP implementation
+
+N: Eric Stotzer
+E: estotzer at ti.com
+D: Clang OpenMP implementation
+
+N: Kelvin Li
+E: kkwli0 at gmail.com
+D: Clang OpenMP implementation
+
+N: Samuel Antao
+E: sfantao at us.ibm.com
+D: Clang OpenMP implementation
+
+N: Sergey Ostanevich
+E: sergos.gnu at gmail.com
+D: Clang OpenMP implementation
+
+N: Alexandre Eichenberger
+E: alexe at us.ibm.com
+D: Clang OpenMP implementation
+
+N: Guansong Zhang
+E: guansong.zhang at amd.com
+D: Clang OpenMP implementation
+
+N: Sunita Chandrasekaran
+E: sunisg123 at gmail.com
+D: Clang OpenMP implementation
+
+N: Michael Wong
+E: fraggamuffin at gmail.com
+D: Clang OpenMP implementation
+
Modified: vendor/llvm/dist/Makefile.config.in
==============================================================================
--- vendor/llvm/dist/Makefile.config.in Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/Makefile.config.in Sun Sep 6 18:34:38 2015 (r287510)
@@ -58,7 +58,7 @@ LLVM_OBJ_ROOT := $(call realpath, @abs
PROJ_SRC_ROOT := $(LLVM_SRC_ROOT)
PROJ_SRC_DIR := $(LLVM_SRC_ROOT)$(patsubst $(PROJ_OBJ_ROOT)%,%,$(PROJ_OBJ_DIR))
-# See: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150323/268067.html
+# See: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20150323/268067.html
ifeq ($(LLVM_SRC_ROOT), $(LLVM_OBJ_ROOT))
$(error In-source builds are not allowed. Please configure from a separate build directory!)
endif
Modified: vendor/llvm/dist/autoconf/configure.ac
==============================================================================
--- vendor/llvm/dist/autoconf/configure.ac Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/autoconf/configure.ac Sun Sep 6 18:34:38 2015 (r287510)
@@ -32,12 +32,12 @@ dnl===----------------------------------
dnl Initialize autoconf and define the package name, version number and
dnl address for reporting bugs.
-AC_INIT([LLVM],[3.7.0svn],[http://llvm.org/bugs/])
+AC_INIT([LLVM],[3.7.0],[http://llvm.org/bugs/])
LLVM_VERSION_MAJOR=3
LLVM_VERSION_MINOR=7
LLVM_VERSION_PATCH=0
-LLVM_VERSION_SUFFIX=svn
+LLVM_VERSION_SUFFIX=
AC_DEFINE_UNQUOTED([LLVM_VERSION_MAJOR], $LLVM_VERSION_MAJOR, [Major version of the LLVM API])
AC_DEFINE_UNQUOTED([LLVM_VERSION_MINOR], $LLVM_VERSION_MINOR, [Minor version of the LLVM API])
Modified: vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake
==============================================================================
--- vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake Sun Sep 6 18:34:38 2015 (r287510)
@@ -131,7 +131,7 @@ endif()
# Pass -Wl,-z,defs. This makes sure all symbols are defined. Otherwise a DSO
# build might work on ELF but fail on MachO/COFF.
-if(NOT (${CMAKE_SYSTEM_NAME} MATCHES "Darwin" OR WIN32 OR
+if(NOT (${CMAKE_SYSTEM_NAME} MATCHES "Darwin" OR WIN32 OR CYGWIN OR
${CMAKE_SYSTEM_NAME} MATCHES "FreeBSD") AND
NOT LLVM_USE_SANITIZER)
set(CMAKE_SHARED_LINKER_FLAGS "${CMAKE_SHARED_LINKER_FLAGS} -Wl,-z,defs")
Modified: vendor/llvm/dist/configure
==============================================================================
--- vendor/llvm/dist/configure Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/configure Sun Sep 6 18:34:38 2015 (r287510)
@@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.60 for LLVM 3.7.0svn.
+# Generated by GNU Autoconf 2.60 for LLVM 3.7.0.
#
# Report bugs to <http://llvm.org/bugs/>.
#
@@ -561,8 +561,8 @@ SHELL=${CONFIG_SHELL-/bin/sh}
# Identity of this package.
PACKAGE_NAME='LLVM'
PACKAGE_TARNAME='llvm'
-PACKAGE_VERSION='3.7.0svn'
-PACKAGE_STRING='LLVM 3.7.0svn'
+PACKAGE_VERSION='3.7.0'
+PACKAGE_STRING='LLVM 3.7.0'
PACKAGE_BUGREPORT='http://llvm.org/bugs/'
ac_unique_file="lib/IR/Module.cpp"
@@ -1333,7 +1333,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
-\`configure' configures LLVM 3.7.0svn to adapt to many kinds of systems.
+\`configure' configures LLVM 3.7.0 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@@ -1399,7 +1399,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
- short | recursive ) echo "Configuration of LLVM 3.7.0svn:";;
+ short | recursive ) echo "Configuration of LLVM 3.7.0:";;
esac
cat <<\_ACEOF
@@ -1583,7 +1583,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
-LLVM configure 3.7.0svn
+LLVM configure 3.7.0
generated by GNU Autoconf 2.60
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
@@ -1599,7 +1599,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
-It was created by LLVM $as_me 3.7.0svn, which was
+It was created by LLVM $as_me 3.7.0, which was
generated by GNU Autoconf 2.60. Invocation command line was
$ $0 $@
@@ -1956,7 +1956,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
LLVM_VERSION_MAJOR=3
LLVM_VERSION_MINOR=7
LLVM_VERSION_PATCH=0
-LLVM_VERSION_SUFFIX=svn
+LLVM_VERSION_SUFFIX=
cat >>confdefs.h <<_ACEOF
@@ -18610,7 +18610,7 @@ exec 6>&1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
-This file was extended by LLVM $as_me 3.7.0svn, which was
+This file was extended by LLVM $as_me 3.7.0, which was
generated by GNU Autoconf 2.60. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@@ -18663,7 +18663,7 @@ Report bugs to <bug-autoconf at gnu.org>."
_ACEOF
cat >>$CONFIG_STATUS <<_ACEOF
ac_cs_version="\\
-LLVM config.status 3.7.0svn
+LLVM config.status 3.7.0
configured by $0, generated by GNU Autoconf 2.60,
with options \\"`echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\"
Modified: vendor/llvm/dist/docs/Atomics.rst
==============================================================================
--- vendor/llvm/dist/docs/Atomics.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/Atomics.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -173,7 +173,7 @@ Notes for code generation
also expected to generate an i8 store as an i8 store, and not an instruction
which writes to surrounding bytes. (If you are writing a backend for an
architecture which cannot satisfy these restrictions and cares about
- concurrency, please send an email to llvmdev.)
+ concurrency, please send an email to llvm-dev.)
Unordered
---------
Modified: vendor/llvm/dist/docs/CMake.rst
==============================================================================
--- vendor/llvm/dist/docs/CMake.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/CMake.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -387,6 +387,10 @@ LLVM-specific variables
``-DLLVM_ENABLE_DOXYGEN_QT_HELP=ON``; otherwise this has no
effect.
+**LLVM_DOXYGEN_SVG**:BOOL
+ Uses .svg files instead of .png files for graphs in the Doxygen output.
+ Defaults to OFF.
+
**LLVM_ENABLE_SPHINX**:BOOL
If enabled CMake will search for the ``sphinx-build`` executable and will make
the ``SPHINX_OUTPUT_HTML`` and ``SPHINX_OUTPUT_MAN`` CMake options available.
Modified: vendor/llvm/dist/docs/CMakeLists.txt
==============================================================================
--- vendor/llvm/dist/docs/CMakeLists.txt Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/CMakeLists.txt Sun Sep 6 18:34:38 2015 (r287510)
@@ -56,6 +56,14 @@ if (LLVM_ENABLE_DOXYGEN)
set(llvm_doxygen_qhp_cust_filter_attrs "")
endif()
+ option(LLVM_DOXYGEN_SVG
+ "Use svg instead of png files for doxygen graphs." OFF)
+ if (LLVM_DOXYGEN_SVG)
+ set(DOT_IMAGE_FORMAT "svg")
+ else()
+ set(DOT_IMAGE_FORMAT "png")
+ endif()
+
configure_file(${CMAKE_CURRENT_SOURCE_DIR}/doxygen.cfg.in
${CMAKE_CURRENT_BINARY_DIR}/doxygen.cfg @ONLY)
@@ -73,6 +81,7 @@ if (LLVM_ENABLE_DOXYGEN)
set(llvm_doxygen_qhelpgenerator_path)
set(llvm_doxygen_qhp_cust_filter_name)
set(llvm_doxygen_qhp_cust_filter_attrs)
+ set(DOT_IMAGE_FORMAT)
add_custom_target(doxygen-llvm
COMMAND ${DOXYGEN_EXECUTABLE} ${CMAKE_CURRENT_BINARY_DIR}/doxygen.cfg
Modified: vendor/llvm/dist/docs/CodeGenerator.rst
==============================================================================
--- vendor/llvm/dist/docs/CodeGenerator.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/CodeGenerator.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -1814,6 +1814,7 @@ Here is the table:
:raw-html:`<th>SystemZ</th>`
:raw-html:`<th>X86</th>`
:raw-html:`<th>XCore</th>`
+:raw-html:`<th>eBPF</th>`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1828,6 +1829,7 @@ Here is the table:
:raw-html:`<td class="yes"></td> <!-- SystemZ -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="yes"></td> <!-- XCore -->`
+:raw-html:`<td class="yes"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1842,6 +1844,7 @@ Here is the table:
:raw-html:`<td class="yes"></td> <!-- SystemZ -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="no"></td> <!-- XCore -->`
+:raw-html:`<td class="no"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1856,6 +1859,7 @@ Here is the table:
:raw-html:`<td class="no"></td> <!-- Sparc -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="yes"></td> <!-- XCore -->`
+:raw-html:`<td class="yes"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1870,6 +1874,7 @@ Here is the table:
:raw-html:`<td class="yes"></td> <!-- SystemZ -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="yes"></td> <!-- XCore -->`
+:raw-html:`<td class="no"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1884,6 +1889,7 @@ Here is the table:
:raw-html:`<td class="yes"></td> <!-- SystemZ -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="no"></td> <!-- XCore -->`
+:raw-html:`<td class="yes"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1898,6 +1904,7 @@ Here is the table:
:raw-html:`<td class="yes"></td> <!-- SystemZ -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="no"></td> <!-- XCore -->`
+:raw-html:`<td class="yes"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1912,6 +1919,7 @@ Here is the table:
:raw-html:`<td class="no"></td> <!-- SystemZ -->`
:raw-html:`<td class="yes"></td> <!-- X86 -->`
:raw-html:`<td class="no"></td> <!-- XCore -->`
+:raw-html:`<td class="no"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`<tr>`
@@ -1926,6 +1934,7 @@ Here is the table:
:raw-html:`<td class="no"></td> <!-- SystemZ -->`
:raw-html:`<td class="partial"><a href="#feat_segstacks_x86">*</a></td> <!-- X86 -->`
:raw-html:`<td class="no"></td> <!-- XCore -->`
+:raw-html:`<td class="no"></td> <!-- eBPF -->`
:raw-html:`</tr>`
:raw-html:`</table>`
@@ -2448,3 +2457,191 @@ Code Generator Options:
:raw-html:`</tr>`
:raw-html:`</table>`
+The extended Berkeley Packet Filter (eBPF) backend
+--------------------------------------------------
+
+Extended BPF (or eBPF) is similar to the original ("classic") BPF (cBPF) used
+to filter network packets. The
+`bpf() system call <http://man7.org/linux/man-pages/man2/bpf.2.html>`_
+performs a range of operations related to eBPF. For both cBPF and eBPF
+programs, the Linux kernel statically analyzes the programs before loading
+them, in order to ensure that they cannot harm the running system. eBPF is
+a 64-bit RISC instruction set designed for one to one mapping to 64-bit CPUs.
+Opcodes are 8-bit encoded, and 87 instructions are defined. There are 10
+registers, grouped by function as outlined below.
+
+::
+
+ R0 return value from in-kernel functions; exit value for eBPF program
+ R1 - R5 function call arguments to in-kernel functions
+ R6 - R9 callee-saved registers preserved by in-kernel functions
+ R10 stack frame pointer (read only)
+
+Instruction encoding (arithmetic and jump)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+eBPF is reusing most of the opcode encoding from classic to simplify conversion
+of classic BPF to eBPF. For arithmetic and jump instructions the 8-bit 'code'
+field is divided into three parts:
+
+::
+
+ +----------------+--------+--------------------+
+ | 4 bits | 1 bit | 3 bits |
+ | operation code | source | instruction class |
+ +----------------+--------+--------------------+
+ (MSB) (LSB)
+
+Three LSB bits store instruction class which is one of:
+
+::
+
+ BPF_LD 0x0
+ BPF_LDX 0x1
+ BPF_ST 0x2
+ BPF_STX 0x3
+ BPF_ALU 0x4
+ BPF_JMP 0x5
+ (unused) 0x6
+ BPF_ALU64 0x7
+
+When BPF_CLASS(code) == BPF_ALU or BPF_ALU64 or BPF_JMP,
+4th bit encodes source operand
+
+::
+
+ BPF_X 0x0 use src_reg register as source operand
+ BPF_K 0x1 use 32 bit immediate as source operand
+
+and four MSB bits store operation code
+
+::
+
+ BPF_ADD 0x0 add
+ BPF_SUB 0x1 subtract
+ BPF_MUL 0x2 multiply
+ BPF_DIV 0x3 divide
+ BPF_OR 0x4 bitwise logical OR
+ BPF_AND 0x5 bitwise logical AND
+ BPF_LSH 0x6 left shift
+ BPF_RSH 0x7 right shift (zero extended)
+ BPF_NEG 0x8 arithmetic negation
+ BPF_MOD 0x9 modulo
+ BPF_XOR 0xa bitwise logical XOR
+ BPF_MOV 0xb move register to register
+ BPF_ARSH 0xc right shift (sign extended)
+ BPF_END 0xd endianness conversion
+
+If BPF_CLASS(code) == BPF_JMP, BPF_OP(code) is one of
+
+::
+
+ BPF_JA 0x0 unconditional jump
+ BPF_JEQ 0x1 jump ==
+ BPF_JGT 0x2 jump >
+ BPF_JGE 0x3 jump >=
+ BPF_JSET 0x4 jump if (DST & SRC)
+ BPF_JNE 0x5 jump !=
+ BPF_JSGT 0x6 jump signed >
+ BPF_JSGE 0x7 jump signed >=
+ BPF_CALL 0x8 function call
+ BPF_EXIT 0x9 function return
+
+Instruction encoding (load, store)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+For load and store instructions the 8-bit 'code' field is divided as:
+
+::
+
+ +--------+--------+-------------------+
+ | 3 bits | 2 bits | 3 bits |
+ | mode | size | instruction class |
+ +--------+--------+-------------------+
+ (MSB) (LSB)
+
+Size modifier is one of
+
+::
+
+ BPF_W 0x0 word
+ BPF_H 0x1 half word
+ BPF_B 0x2 byte
+ BPF_DW 0x3 double word
+
+Mode modifier is one of
+
+::
+
+ BPF_IMM 0x0 immediate
+ BPF_ABS 0x1 used to access packet data
+ BPF_IND 0x2 used to access packet data
+ BPF_MEM 0x3 memory
+ (reserved) 0x4
+ (reserved) 0x5
+ BPF_XADD 0x6 exclusive add
+
+
+Packet data access (BPF_ABS, BPF_IND)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Two non-generic instructions: (BPF_ABS | <size> | BPF_LD) and
+(BPF_IND | <size> | BPF_LD) which are used to access packet data.
+Register R6 is an implicit input that must contain pointer to sk_buff.
+Register R0 is an implicit output which contains the data fetched
+from the packet. Registers R1-R5 are scratch registers and must not
+be used to store the data across BPF_ABS | BPF_LD or BPF_IND | BPF_LD
+instructions. These instructions have implicit program exit condition
+as well. When eBPF program is trying to access the data beyond
+the packet boundary, the interpreter will abort the execution of the program.
+
+BPF_IND | BPF_W | BPF_LD is equivalent to:
+ R0 = ntohl(\*(u32 \*) (((struct sk_buff \*) R6)->data + src_reg + imm32))
+
+eBPF maps
+^^^^^^^^^
+
+eBPF maps are provided for sharing data between kernel and user-space.
+Currently implemented types are hash and array, with potential extension to
+support bloom filters, radix trees, etc. A map is defined by its type,
+maximum number of elements, key size and value size in bytes. eBPF syscall
+supports create, update, find and delete functions on maps.
+
+Function calls
+^^^^^^^^^^^^^^
+
+Function call arguments are passed using up to five registers (R1 - R5).
+The return value is passed in a dedicated register (R0). Four additional
+registers (R6 - R9) are callee-saved, and the values in these registers
+are preserved within kernel functions. R0 - R5 are scratch registers within
+kernel functions, and eBPF programs must therefor store/restore values in
+these registers if needed across function calls. The stack can be accessed
+using the read-only frame pointer R10. eBPF registers map 1:1 to hardware
+registers on x86_64 and other 64-bit architectures. For example, x86_64
+in-kernel JIT maps them as
+
+::
+
+ R0 - rax
+ R1 - rdi
+ R2 - rsi
+ R3 - rdx
+ R4 - rcx
+ R5 - r8
+ R6 - rbx
+ R7 - r13
+ R8 - r14
+ R9 - r15
+ R10 - rbp
+
+since x86_64 ABI mandates rdi, rsi, rdx, rcx, r8, r9 for argument passing
+and rbx, r12 - r15 are callee saved.
+
+Program start
+^^^^^^^^^^^^^
+
+An eBPF program receives a single argument and contains
+a single eBPF main routine; the program does not contain eBPF functions.
+Function calls are limited to a predefined set of kernel functions. The size
+of a program is limited to 4K instructions: this ensures fast termination and
+a limited number of kernel function calls. Prior to running an eBPF program,
+a verifier performs static analysis to prevent loops in the code and
+to ensure valid register usage and operand types.
Modified: vendor/llvm/dist/docs/CodingStandards.rst
==============================================================================
--- vendor/llvm/dist/docs/CodingStandards.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/CodingStandards.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -28,7 +28,7 @@ Note that some code bases (e.g. ``libc++
from the coding standards. In the case of ``libc++``, this is because the
naming and other conventions are dictated by the C++ standard. If you think
there is a specific good reason to deviate from the standards here, please bring
-it up on the LLVMdev mailing list.
+it up on the LLVM-dev mailing list.
There are some conventions that are not uniformly followed in the code base
(e.g. the naming convention). This is because they are relatively new, and a
Modified: vendor/llvm/dist/docs/DeveloperPolicy.rst
==============================================================================
--- vendor/llvm/dist/docs/DeveloperPolicy.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/DeveloperPolicy.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -30,7 +30,7 @@ This policy is also designed to accompli
This policy is aimed at frequent contributors to LLVM. People interested in
contributing one-off patches can do so in an informal way by sending them to the
`llvm-commits mailing list
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits>`_ and engaging another
+<http://lists.llvm.org/mailman/listinfo/llvm-commits>`_ and engaging another
developer to see it through the process.
Developer Policies
@@ -47,23 +47,23 @@ Stay Informed
-------------
Developers should stay informed by reading at least the "dev" mailing list for
-the projects you are interested in, such as `llvmdev
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ for LLVM, `cfe-dev
-<http://lists.cs.uiuc.edu/mailman/listinfo/cfe-dev>`_ for Clang, or `lldb-dev
-<http://lists.cs.uiuc.edu/mailman/listinfo/lldb-dev>`_ for LLDB. If you are
+the projects you are interested in, such as `llvm-dev
+<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ for LLVM, `cfe-dev
+<http://lists.llvm.org/mailman/listinfo/cfe-dev>`_ for Clang, or `lldb-dev
+<http://lists.llvm.org/mailman/listinfo/lldb-dev>`_ for LLDB. If you are
doing anything more than just casual work on LLVM, it is suggested that you also
subscribe to the "commits" mailing list for the subproject you're interested in,
such as `llvm-commits
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits>`_, `cfe-commits
-<http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits>`_, or `lldb-commits
-<http://lists.cs.uiuc.edu/mailman/listinfo/lldb-commits>`_. Reading the
+<http://lists.llvm.org/mailman/listinfo/llvm-commits>`_, `cfe-commits
+<http://lists.llvm.org/mailman/listinfo/cfe-commits>`_, or `lldb-commits
+<http://lists.llvm.org/mailman/listinfo/lldb-commits>`_. Reading the
"commits" list and paying attention to changes being made by others is a good
way to see what other people are interested in and watching the flow of the
project as a whole.
We recommend that active developers register an email account with `LLVM
Bugzilla <http://llvm.org/bugs/>`_ and preferably subscribe to the `llvm-bugs
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvmbugs>`_ email list to keep track
+<http://lists.llvm.org/mailman/listinfo/llvm-bugs>`_ email list to keep track
of bugs and enhancements occurring in LLVM. We really appreciate people who are
proactive at catching incoming bugs in their components and dealing with them
promptly.
@@ -365,7 +365,7 @@ If you have recently been granted commit
#. You are granted *commit-after-approval* to all parts of LLVM. To get
approval, submit a `patch`_ to `llvm-commits
- <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits>`_. When approved,
+ <http://lists.llvm.org/mailman/listinfo/llvm-commits>`_. When approved,
you may commit it yourself.
#. You are allowed to commit patches without approval which you think are
@@ -394,8 +394,8 @@ Making a Major Change
---------------------
When a developer begins a major new project with the aim of contributing it back
-to LLVM, they should inform the community with an email to the `llvmdev
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ email list, to the extent
+to LLVM, they should inform the community with an email to the `llvm-dev
+<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ email list, to the extent
possible. The reason for this is to:
#. keep the community informed about future changes to LLVM,
@@ -608,7 +608,7 @@ LICENSE.txt files specifically indicate
We have no plans to change the license of LLVM. If you have questions or
comments about the license, please contact the `LLVM Developer's Mailing
-List <mailto:llvmdev at cs.uiuc.edu>`_.
+List <mailto:llvm-dev at lists.llvm.org>`_.
Patents
-------
Modified: vendor/llvm/dist/docs/ExtendingLLVM.rst
==============================================================================
--- vendor/llvm/dist/docs/ExtendingLLVM.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/ExtendingLLVM.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -15,7 +15,7 @@ When you come to this realization, stop
LLVM? Is it a new fundamental capability that LLVM does not support at its
current incarnation or can it be synthesized from already pre-existing LLVM
elements? If you are not sure, ask on the `LLVM-dev
-<http://mail.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ list. The reason is that
+<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ list. The reason is that
extending LLVM will get involved as you need to update all the different passes
that you intend to use with your extension, and there are ``many`` LLVM analyses
and transformations, so it may be quite a bit of work.
Modified: vendor/llvm/dist/docs/Frontend/PerformanceTips.rst
==============================================================================
--- vendor/llvm/dist/docs/Frontend/PerformanceTips.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/Frontend/PerformanceTips.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -174,10 +174,10 @@ Adding to this document
If you run across a case that you feel deserves to be covered here, please send
a patch to `llvm-commits
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits>`_ for review.
+<http://lists.llvm.org/mailman/listinfo/llvm-commits>`_ for review.
-If you have questions on these items, please direct them to `llvmdev
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_. The more relevant
+If you have questions on these items, please direct them to `llvm-dev
+<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_. The more relevant
context you are able to give to your question, the more likely it is to be
answered.
Modified: vendor/llvm/dist/docs/GettingStarted.rst
==============================================================================
--- vendor/llvm/dist/docs/GettingStarted.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/GettingStarted.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -714,9 +714,9 @@ used by people developing LLVM.
| | the configure script. The default list is defined |
| | as ``LLVM_ALL_TARGETS``, and can be set to include |
| | out-of-tree targets. The default value includes: |
-| | ``AArch64, ARM, CppBackend, Hexagon, |
-| | Mips, MSP430, NVPTX, PowerPC, AMDGPU, Sparc, |
-| | SystemZ, X86, XCore``. |
+| | ``AArch64, AMDGPU, ARM, BPF, CppBackend, Hexagon, |
+| | Mips, MSP430, NVPTX, PowerPC, Sparc, SystemZ |
+| | X86, XCore``. |
+-------------------------+----------------------------------------------------+
| LLVM_ENABLE_DOXYGEN | Build doxygen-based documentation from the source |
| | code This is disabled by default because it is |
Modified: vendor/llvm/dist/docs/LangRef.rst
==============================================================================
--- vendor/llvm/dist/docs/LangRef.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/LangRef.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -6493,7 +6493,7 @@ Example:
%ptr = alloca i32 ; yields i32*:ptr
store i32 3, i32* %ptr ; yields void
- %val = load i32* %ptr ; yields i32:val = i32 3
+ %val = load i32, i32* %ptr ; yields i32:val = i32 3
.. _i_fence:
Modified: vendor/llvm/dist/docs/Makefile
==============================================================================
--- vendor/llvm/dist/docs/Makefile Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/Makefile Sun Sep 6 18:34:38 2015 (r287510)
@@ -31,6 +31,7 @@ $(PROJ_OBJ_DIR)/doxygen.cfg: doxygen.cfg
-e 's/@llvm_doxygen_qhp_cust_filter_name@//g' \
-e 's/@llvm_doxygen_qhp_namespace@//g' \
-e 's/@searchengine_url@//g' \
+ -e 's/@DOT_IMAGE_FORMAT@/png/g' \
> $@
endif
Modified: vendor/llvm/dist/docs/Phabricator.rst
==============================================================================
--- vendor/llvm/dist/docs/Phabricator.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/Phabricator.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -150,7 +150,7 @@ Status
Please let us know whether you like it and what could be improved! We're still
working on setting up a bug tracker, but you can email klimek-at-google-dot-com
-and chandlerc-at-gmail-dot-com and CC the llvmdev mailing list with questions
+and chandlerc-at-gmail-dot-com and CC the llvm-dev mailing list with questions
until then. We also could use help implementing improvements. This sadly is
really painful and hard because the Phabricator codebase is in PHP and not as
testable as you might like. However, we've put exactly what we're deploying up
Modified: vendor/llvm/dist/docs/Projects.rst
==============================================================================
--- vendor/llvm/dist/docs/Projects.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/Projects.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -254,4 +254,4 @@ Further Help
If you have any questions or need any help creating an LLVM project, the LLVM
team would be more than happy to help. You can always post your questions to
the `LLVM Developers Mailing List
-<http://lists.cs.uiuc.edu/pipermail/llvmdev/>`_.
+<http://lists.llvm.org/pipermail/llvm-dev/>`_.
Modified: vendor/llvm/dist/docs/ReleaseNotes.rst
==============================================================================
--- vendor/llvm/dist/docs/ReleaseNotes.rst Sun Sep 6 17:47:03 2015 (r287509)
+++ vendor/llvm/dist/docs/ReleaseNotes.rst Sun Sep 6 18:34:38 2015 (r287510)
@@ -5,12 +5,6 @@ LLVM 3.7 Release Notes
.. contents::
:local:
-.. warning::
- These are in-progress notes for the upcoming LLVM 3.7 release. You may
- prefer the `LLVM 3.6 Release Notes <http://llvm.org/releases/3.6.0/docs
- /ReleaseNotes.html>`_.
-
-
Introduction
============
@@ -23,7 +17,7 @@ from the `LLVM releases web site <http:/
For more information about LLVM, including information about the latest
release, please check out the `main LLVM web site <http://llvm.org/>`_. If you
have questions or comments, the `LLVM Developer's Mailing List
-<http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev>`_ is a good place to send
+<http://lists.llvm.org/mailman/listinfo/llvm-dev>`_ is a good place to send
them.
Note that if you are reading this file from a Subversion checkout or the main
@@ -48,46 +42,346 @@ Non-comprehensive list of changes in thi
collection of tips for frontend authors on how to generate IR which LLVM is
able to effectively optimize.
-* The DataLayout is no longer optional. All the IR level optimizations expects
+* The ``DataLayout`` is no longer optional. All the IR level optimizations expects
it to be present and the API has been changed to use a reference instead of
a pointer to make it explicit. The Module owns the datalayout and it has to
match the one attached to the TargetMachine for generating code.
-* ... next change ...
+ In 3.6, a pass was inserted in the pipeline to make the ``DataLayout`` accessible:
+ ``MyPassManager->add(new DataLayoutPass(MyTargetMachine->getDataLayout()));``
+ In 3.7, you don't need a pass, you set the ``DataLayout`` on the ``Module``:
+ ``MyModule->setDataLayout(MyTargetMachine->createDataLayout());``
+
+ The LLVM C API ``LLVMGetTargetMachineData`` is deprecated to reflect the fact
+ that it won't be available anymore from ``TargetMachine`` in 3.8.
+
+* Comdats are now orthogonal to the linkage. LLVM will not create
+ comdats for weak linkage globals and the frontends are responsible
+ for explicitly adding them.
+
+* On ELF we now support multiple sections with the same name and
+ comdat. This allows for smaller object files since multiple
+ sections can have a simple name (`.text`, `.rodata`, etc).
+
+* LLVM now lazily loads metadata in some cases. Creating archives
+ with IR files with debug info is now 25X faster.
+
+* llvm-ar can create archives in the BSD format used by OS X.
+
+* LLVM received a backend for the extended Berkely Packet Filter
+ instruction set that can be dynamically loaded into the Linux kernel via the
+ `bpf(2) <http://man7.org/linux/man-pages/man2/bpf.2.html>`_ syscall.
+
+ Support for BPF has been present in the kernel for some time, but starting
+ from 3.18 has been extended with such features as: 64-bit registers, 8
+ additional registers registers, conditional backwards jumps, call
+ instruction, shift instructions, map (hash table, array, etc.), 1-8 byte
+ load/store from stack, and more.
+
+ Up until now, users of BPF had to write bytecode by hand, or use
+ custom generators. This release adds a proper LLVM backend target for the BPF
+ bytecode architecture.
+
+ The BPF target is now available by default, and options exist in both Clang
+ (-target bpf) or llc (-march=bpf) to pick eBPF as a backend.
+
+* Switch-case lowering was rewritten to avoid generating unbalanced search trees
+ (`PR22262 <http://llvm.org/pr22262>`_) and to exploit profile information
+ when available. Some lowering strategies are now disabled when optimizations
+ are turned off, to save compile time.
+
+* The debug info IR class hierarchy now inherits from ``Metadata`` and has its
+ own bitcode records and assembly syntax
+ (`documented in LangRef <LangRef.html#specialized-metadata-nodes>`_). The debug
+ info verifier has been merged with the main verifier.
+
+* LLVM IR and APIs are in a period of transition to aid in the removal of
+ pointer types (the end goal being that pointers are typeless/opaque - void*,
+ if you will). Some APIs and IR constructs have been modified to take
+ explicit types that are currently checked to match the target type of their
+ pre-existing pointer type operands. Further changes are still needed, but the
+ more you can avoid using ``PointerType::getPointeeType``, the easier the
+ migration will be.
+
+* Argument-less ``TargetMachine::getSubtarget`` and
+ ``TargetMachine::getSubtargetImpl`` have been removed from the tree. Updating
+ out of tree ports is as simple as implementing a non-virtual version in the
+ target, but implementing full ``Function`` based ``TargetSubtargetInfo``
+ support is recommended.
+
+* This is expected to be the last major release of LLVM that supports being
+ run on Windows XP and Windows Vista. For the next major release the minimum
+ Windows version requirement will be Windows 7.
-.. NOTE
- If you would like to document a larger change, then you can add a
- subsection about it right here. You can copy the following boilerplate
- and un-indent it (the indentation causes it to be inside this comment).
+Changes to the MIPS Target
+--------------------------
- Special New Feature
- -------------------
+During this release the MIPS target has:
- Makes programs 10x faster by doing Special New Thing.
+* Added support for MIPS32R3, MIPS32R5, MIPS32R3, MIPS32R5, and microMIPS32.
-Changes to the ARM Backend
---------------------------
+* Added support for dynamic stack realignment. This is of particular importance
+ to MSA on 32-bit subtargets since vectors always exceed the stack alignment on
+ the O32 ABI.
- During this release ...
+* Added support for compiler-rt including:
+ * Support for the Address, and Undefined Behaviour Sanitizers for all MIPS
+ subtargets.
-Changes to the MIPS Target
---------------------------
+ * Support for the Data Flow, and Memory Sanitizer for 64-bit subtargets.
+
+ * Support for the Profiler for all MIPS subtargets.
+
+* Added support for libcxx, and libcxxabi.
+
+* Improved inline assembly support such that memory constraints may now make use
+ of the appropriate address offsets available to the instructions. Also, added
+ support for the ``ZC`` constraint.
+
+* Added support for 128-bit integers on 64-bit subtargets and 16-bit floating
+ point conversions on all subtargets.
+
+* Added support for read-only ``.eh_frame`` sections by storing type information
+ indirectly.
+
+* Added support for MCJIT on all 64-bit subtargets as well as MIPS32R6.
+
+* Added support for fast instruction selection on MIPS32 and MIPS32R2 with PIC.
+
+* Various bug fixes. Including the following notable fixes:
+
+ * Fixed 'jumpy' debug line info around calls where calculation of the address
+ of the function would inappropriately change the line number.
+
+ * Fixed missing ``__mips_isa_rev`` macro on the MIPS32R6 and MIPS32R6
+ subtargets.
+
+ * Fixed representation of NaN when targeting systems using traditional
+ encodings. Traditionally, MIPS has used NaN encodings that were compatible
+ with IEEE754-1985 but would later be found incompatible with IEEE754-2008.
+
+ * Fixed multiple segfaults and assertions in the disassembler when
+ disassembling instructions that have memory operands.
+
+ * Fixed multiple cases of suboptimal code generation involving $zero.
- During this release ...
+ * Fixed code generation of 128-bit shifts on 64-bit subtargets.
+ * Prevented the delay slot filler from filling call delay slots with
+ instructions that modify or use $ra.
+
+ * Fixed some remaining N32/N64 calling convention bugs when using small
+ structures on big-endian subtargets.
+
+ * Fixed missing sign-extensions that are required by the N32/N64 calling
+ convention when generating calls to library functions with 32-bit
+ parameters.
+
+ * Corrected the ``int64_t`` typedef to be ``long`` for N64.
+
+ * ``-mno-odd-spreg`` is now honoured for vector insertion/extraction
+ operations when using -mmsa.
+
+ * Fixed vector insertion and extraction for MSA on 64-bit subtargets.
+
+ * Corrected the representation of member function pointers. This makes them
+ usable on microMIPS subtargets.
Changes to the PowerPC Target
-----------------------------
- During this release ...
+There are numerous improvements to the PowerPC target in this release:
+
+* LLVM now supports the ISA 2.07B (POWER8) instruction set, including
+ direct moves between general registers and vector registers, and
+ built-in support for hardware transactional memory (HTM). Some missing
+ instructions from ISA 2.06 (POWER7) were also added.
+
+* Code generation for the local-dynamic and global-dynamic thread-local
+ storage models has been improved.
+
+* Loops may be restructured to leverage pre-increment loads and stores.
+
+* QPX - The vector instruction set used by the IBM Blue Gene/Q supercomputers
+ is now supported.
+* Loads from the TOC area are now correctly treated as invariant.
-Changes to the OCaml bindings
+* PowerPC now has support for i128 and v1i128 types. The types differ
+ in how they are passed in registers for the ELFv2 ABI.
+
+* Disassembly will now print shorter mnemonic aliases when available.
+
+* Optional register name prefixes for VSX and QPX registers are now
+ supported in the assembly parser.
+
+* The back end now contains a pass to remove unnecessary vector swaps
+ from POWER8 little-endian code generation. Additional improvements
+ are planned for release 3.8.
+
+* The undefined-behavior sanitizer (UBSan) is now supported for PowerPC.
+
+* Many new vector programming APIs have been added to altivec.h.
+ Additional ones are planned for release 3.8.
+
+* PowerPC now supports __builtin_call_with_static_chain.
+
+* PowerPC now supports the revised -mrecip option that permits finer
+ control over reciprocal estimates.
+
+* Many bugs have been identified and fixed.
+
+Changes to the SystemZ Target
-----------------------------
- During this release ...
+* LLVM no longer attempts to automatically detect the current host CPU when
+ invoked natively.
+
+* Support for all thread-local storage models. (Previous releases would support
+ only the local-exec TLS model.)
+* The POPCNT instruction is now used on z196 and above.
+
+* The RISBGN instruction is now used on zEC12 and above.
+
+* Support for the transactional-execution facility on zEC12 and above.
+
+* Support for the z13 processor and its vector facility.
+
+
+Changes to the JIT APIs
+-----------------------
+
+* Added a new C++ JIT API called On Request Compilation, or ORC.
+
+ ORC is a new JIT API inspired by MCJIT but designed to be more testable, and
+ easier to extend with new features. A key new feature already in tree is lazy,
+ function-at-a-time compilation for X86. Also included is a reimplementation of
+ MCJIT's API and behavior (OrcMCJITReplacement). MCJIT itself remains in tree,
+ and continues to be the default JIT ExecutionEngine, though new users are
+ encouraged to try ORC out for their projects. (A good place to start is the
+ new ORC tutorials under llvm/examples/kaleidoscope/orc).
+
+Sub-project Status Update
+=========================
+
+In addition to the core LLVM 3.7 distribution of production-quality compiler
+infrastructure, the LLVM project includes sub-projects that use the LLVM core
+and share the same distribution license. This section provides updates on these
+sub-projects.
+
+Polly - The Polyhedral Loop Optimizer in LLVM
+---------------------------------------------
+
+`Polly <http://polly.llvm.org>`_ is a polyhedral loop optimization
+infrastructure that provides data-locality optimizations to LLVM-based
+compilers. When compiled as part of clang or loaded as a module into clang,
+it can perform loop optimizations such as tiling, loop fusion or outer-loop
+vectorization. As a generic loop optimization infrastructure it allows
+developers to get a per-loop-iteration model of a loop nest on which detailed
+analysis and transformations can be performed.
+
+Changes since the last release:
+
+* isl imported into Polly distribution
+
+ `isl <http://repo.or.cz/w/isl.git>`_, the math library Polly uses, has been
+ imported into the source code repository of Polly and is now distributed as part
+ of Polly. As this was the last external library dependency of Polly, Polly can
+ now be compiled right after checking out the Polly source code without the need
+ for any additional libraries to be pre-installed.
+
+* Small integer optimization of isl
+
+ The MIT licensed imath backend using in `isl <http://repo.or.cz/w/isl.git>`_ for
+ arbitrary width integer computations has been optimized to use native integer
+ operations for the common case where the operands of a computation fit into 32
+ bit and to only fall back to large arbitrary precision integers for the
+ remaining cases. This optimization has greatly improved the compile-time
+ performance of Polly, both due to faster native operations also due to a
+ reduction in malloc traffic and pointer indirections. As a result, computations
+ that use arbitrary precision integers heavily have been speed up by almost 6x.
+ As a result, the compile-time of Polly on the Polybench test kernels in the LNT
+ suite has been reduced by 20% on average with compile time reductions between
+ 9-43%.
+
+* Schedule Trees
+
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