svn commit: r277307 - in head/sys: arm/broadcom/bcm2835 dev/sdhci
Ian Lepore
ian at FreeBSD.org
Sat Jan 17 19:57:05 UTC 2015
Author: ian
Date: Sat Jan 17 19:57:03 2015
New Revision: 277307
URL: https://svnweb.freebsd.org/changeset/base/277307
Log:
Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT. Apparently some
sdhci controllers, such as the one on a Raspberry Pi, mishandle the signal
timing in high speed signaling mode, but run just fine in standard mode
with the bus running at frequencies between 25-50MHz (which shouldn't work).
This is the solution adopted by U-Boot and other OSes (linux and *BSD)
for the timeouts on Raspberry Pi boards with certain SD cards. Some
research shows that this quirk is also used on a few other boards, so the
fix is a generic quirk instead of being in the RPi-specific driver code.
This change is based on information discovered by Michal Meloun.
Modified:
head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
head/sys/dev/sdhci/sdhci.c
head/sys/dev/sdhci/sdhci.h
Modified: head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c
==============================================================================
--- head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c Sat Jan 17 18:56:22 2015 (r277306)
+++ head/sys/arm/broadcom/bcm2835/bcm2835_sdhci.c Sat Jan 17 19:57:03 2015 (r277307)
@@ -91,7 +91,7 @@ __FBSDID("$FreeBSD$");
* HS mode still can be enabled with the tunable.
*/
static int bcm2835_sdhci_min_freq = 400000;
-static int bcm2835_sdhci_hs = 0;
+static int bcm2835_sdhci_hs = 1;
static int bcm2835_sdhci_pio_mode = 0;
TUNABLE_INT("hw.bcm2835.sdhci.min_freq", &bcm2835_sdhci_min_freq);
@@ -235,6 +235,7 @@ bcm_sdhci_attach(device_t dev)
sc->sc_slot.caps |= (default_freq << SDHCI_CLOCK_BASE_SHIFT);
sc->sc_slot.quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK
| SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
+ | SDHCI_QUIRK_DONT_SET_HISPD_BIT
| SDHCI_QUIRK_MISSING_CAPS;
sdhci_init_slot(dev, &sc->sc_slot, 0);
Modified: head/sys/dev/sdhci/sdhci.c
==============================================================================
--- head/sys/dev/sdhci/sdhci.c Sat Jan 17 18:56:22 2015 (r277306)
+++ head/sys/dev/sdhci/sdhci.c Sat Jan 17 19:57:03 2015 (r277307)
@@ -696,7 +696,8 @@ sdhci_generic_update_ios(device_t brdev,
slot->hostctrl |= SDHCI_CTRL_4BITBUS;
else
slot->hostctrl &= ~SDHCI_CTRL_4BITBUS;
- if (ios->timing == bus_timing_hs)
+ if (ios->timing == bus_timing_hs &&
+ !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
slot->hostctrl |= SDHCI_CTRL_HISPD;
else
slot->hostctrl &= ~SDHCI_CTRL_HISPD;
Modified: head/sys/dev/sdhci/sdhci.h
==============================================================================
--- head/sys/dev/sdhci/sdhci.h Sat Jan 17 18:56:22 2015 (r277306)
+++ head/sys/dev/sdhci/sdhci.h Sat Jan 17 19:57:03 2015 (r277307)
@@ -61,6 +61,8 @@
#define SDHCI_QUIRK_DONT_SHIFT_RESPONSE (1<<13)
/* Wait to see reset bit asserted before waiting for de-asserted */
#define SDHCI_QUIRK_WAITFOR_RESET_ASSERTED (1<<14)
+/* Leave controller in standard mode when putting card in HS mode. */
+#define SDHCI_QUIRK_DONT_SET_HISPD_BIT (1<<15)
/*
* Controller registers
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