svn commit: r277304 - head/sys/contrib/dev/ath/ath_hal/ar9300

Adrian Chadd adrian at FreeBSD.org
Sat Jan 17 17:37:10 UTC 2015


Author: adrian
Date: Sat Jan 17 17:37:08 2015
New Revision: 277304
URL: https://svnweb.freebsd.org/changeset/base/277304

Log:
  Correct the descriptor length for AR9462/AR9565 and set the final field
  to zero - TX drops are otherwise reported.
  
  Tested:
  
  * AR9462 (WB222), STA mode
  
  Obtained from:	Linux ath9k

Modified:
  head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_xmit_ds.c
  head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300desc.h

Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_xmit_ds.c
==============================================================================
--- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_xmit_ds.c	Sat Jan 17 17:31:47 2015	(r277303)
+++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_xmit_ds.c	Sat Jan 17 17:37:08 2015	(r277304)
@@ -68,9 +68,11 @@ ar9300_fill_tx_desc(
     const void *ds0)
 {
     struct ar9300_txc *ads = AR9300TXC(ds);
+    short desclen;
 
     /* Fill TXC info field */
-    ads->ds_info = TXC_INFO(qcu);
+    desclen = (AR_SREV_JUPITER(ah) || AR_SREV_APHRODITE(ah)) ? 0x18 : 0x17;
+    ads->ds_info = TXC_INFO(qcu, desclen);
 
     /* Set the buffer addresses */
     ads->ds_data0 = buf_addr[0];
@@ -124,6 +126,9 @@ ar9300_fill_tx_desc(
         ads->ds_ctl17 = SM(key_type, AR_encr_type);
     }
 
+    /* Only relevant for Jupiter/Aphrodite */
+    ads->ds_ctl23 = 0;
+
     return AH_TRUE;
 }
 

Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300desc.h
==============================================================================
--- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300desc.h	Sat Jan 17 17:31:47 2015	(r277303)
+++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300desc.h	Sat Jan 17 17:37:08 2015	(r277304)
@@ -78,7 +78,8 @@ struct ar9300_txc {
     u_int32_t   ds_ctl20;  /* DMA control 20 */
     u_int32_t   ds_ctl21;  /* DMA control 21 */
     u_int32_t   ds_ctl22;  /* DMA control 22 */
-    u_int32_t   ds_pad[9]; /* pad to cache line (128 bytes/32 dwords) */
+    u_int32_t   ds_ctl23;  /* DMA control 23 */
+    u_int32_t   ds_pad[8]; /* pad to cache line (128 bytes/32 dwords) */
 };
 
 
@@ -429,11 +430,11 @@ struct ar9300_txc {
 #define RXSTATUS_NUMWORDS(ah) 11
 
 
-#define TXC_INFO(_qcu) (ATHEROS_VENDOR_ID << AR_desc_id_S) \
+#define TXC_INFO(_qcu, _desclen) (ATHEROS_VENDOR_ID << AR_desc_id_S) \
                         | (1 << AR_tx_rx_desc_S) \
                         | (1 << AR_ctrl_stat_S) \
                         | (_qcu << AR_tx_qcu_num_S) \
-                        | (0x17)
+                        | (_desclen)
 
 #define VALID_KEY_TYPES \
         ((1 << HAL_KEY_TYPE_CLEAR) | (1 << HAL_KEY_TYPE_WEP)|\


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