svn commit: r279406 - in head/sys: amd64/amd64 i386/i386
Adrian Chadd
adrian at freebsd.org
Sat Feb 28 22:08:44 UTC 2015
Thanks for promptly finding/fixing this!
For the record, the CPU I have in this zenbook:
CPU: Intel(R) Core(TM) i5-2467M CPU @ 1.60GHz (1596.41-MHz K8-class CPU)
On 28 February 2015 at 12:37, Konstantin Belousov <kib at freebsd.org> wrote:
> Author: kib
> Date: Sat Feb 28 20:37:38 2015
> New Revision: 279406
> URL: https://svnweb.freebsd.org/changeset/base/279406
>
> Log:
> Supposed fix for some SandyBridge mobile CPUs hang on AP startup when
> x2APIC mode is detected and enabled. Current theory is that switching
> the APIC mode while an IPI is in flight might be the issue.
>
> Postpone switching to x2APIC mode until we are guaranteed that all
> starting IPIs are already send and aknowledged. Use aps_ready signal
> as an indication that the BSP is done with us.
>
> Tested by: adrian
> Sponsored by: The FreeBSD Foundation
> MFC after: 2 months
>
> Modified:
> head/sys/amd64/amd64/mp_machdep.c
> head/sys/i386/i386/mp_machdep.c
>
> Modified: head/sys/amd64/amd64/mp_machdep.c
> ==============================================================================
> --- head/sys/amd64/amd64/mp_machdep.c Sat Feb 28 20:30:29 2015 (r279405)
> +++ head/sys/amd64/amd64/mp_machdep.c Sat Feb 28 20:37:38 2015 (r279406)
> @@ -705,12 +705,6 @@ init_secondary(void)
> wrmsr(MSR_STAR, msr);
> wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
>
> - /*
> - * On real hardware, switch to x2apic mode if possible.
> - * Disable local APIC until BSP directed APs to run.
> - */
> - lapic_xapic_mode();
> -
> /* signal our startup to the BSP. */
> mp_naps++;
>
> @@ -718,6 +712,14 @@ init_secondary(void)
> while (!aps_ready)
> ia32_pause();
>
> + /*
> + * On real hardware, switch to x2apic mode if possible. Do it
> + * after aps_ready was signalled, to avoid manipulating the
> + * mode while BSP might still want to send some IPI to us
> + * (second startup IPI is ignored on modern hardware etc).
> + */
> + lapic_xapic_mode();
> +
> /* Initialize the PAT MSR. */
> pmap_init_pat();
>
>
> Modified: head/sys/i386/i386/mp_machdep.c
> ==============================================================================
> --- head/sys/i386/i386/mp_machdep.c Sat Feb 28 20:30:29 2015 (r279405)
> +++ head/sys/i386/i386/mp_machdep.c Sat Feb 28 20:37:38 2015 (r279406)
> @@ -719,12 +719,6 @@ init_secondary(void)
> load_cr0(cr0);
> CHECK_WRITE(0x38, 5);
>
> - /*
> - * On real hardware, switch to x2apic mode if possible.
> - * Disable local APIC until BSP directed APs to run.
> - */
> - lapic_xapic_mode();
> -
> /* signal our startup to the BSP. */
> mp_naps++;
> CHECK_WRITE(0x39, 6);
> @@ -742,6 +736,14 @@ init_secondary(void)
> lidt(&r_idt);
> #endif
>
> + /*
> + * On real hardware, switch to x2apic mode if possible. Do it
> + * after aps_ready was signalled, to avoid manipulating the
> + * mode while BSP might still want to send some IPI to us
> + * (second startup IPI is ignored on modern hardware etc).
> + */
> + lapic_xapic_mode();
> +
> /* Initialize the PAT MSR if present. */
> pmap_init_pat();
>
>
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