svn commit: r286595 - head/sys/dev/uart

[Ian Lepore]

Author: ian
Date: Mon Aug 10 20:54:03 2015
New Revision: 286595
URL: https://svnweb.freebsd.org/changeset/base/286595

Log:
  Correct the polarity of the PPS assert and clear events with respect to the
  electrical signals on the serial port.  Virtually all devices which output a
  PPS signal generate a brief higher-voltage pulse, the leading edge of which
  is the on-time point.
  
  Both DCD and CTS are active-low signals on the wire, meaning the assertion
  of their status bits in the modem status register corresponds to the lower
  voltage level on the wire.  So when the status bit transitions to not-set,
  create a PPS assert event; when the status bit transitions to set, create a
  PPS clear event.

Modified:
  head/sys/dev/uart/uart_core.c

Modified: head/sys/dev/uart/uart_core.c
==============================================================================
--- head/sys/dev/uart/uart_core.c	Mon Aug 10 20:50:31 2015	(r286594)
+++ head/sys/dev/uart/uart_core.c	Mon Aug 10 20:54:03 2015	(r286595)
@@ -320,12 +320,18 @@ uart_intr_sigchg(void *arg)
 
 	sig = UART_GETSIG(sc);
 
+	/*
+	 * Time pulse counting support. Note that both CTS and DCD are
+	 * active-low signals. The status bit is high to indicate that
+	 * the signal on the line is low, which corresponds to a PPS
+	 * clear event.
+	 */
 	if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
 		pps_sig = uart_pps_signal(sc->sc_pps_mode);
 		if (sig & SER_DELTA(pps_sig)) {
 			pps_capture(&sc->sc_pps);
 			pps_event(&sc->sc_pps, (sig & pps_sig) ?
-			    PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
+			    PPS_CAPTURECLEAR : PPS_CAPTUREASSERT);
 		}
 	}