svn commit: r271171 - in stable/10/sys/powerpc: include powerpc
Justin Hibbits
jhibbits at FreeBSD.org
Fri Sep 5 15:13:42 UTC 2014
Author: jhibbits
Date: Fri Sep 5 15:13:41 2014
New Revision: 271171
URL: http://svnweb.freebsd.org/changeset/base/271171
Log:
MFC r261095,r263464,r263752,r264189
r263464,r263752,r275189:
Mask out SRR1 bits that aren't exported to the MSR.
This appears to fix a strange condition with X on 32-bit PowerBooks I
observed, caused by one of these bits getting set in the mcontext, but
not set in the thread, which is a symptom of another problem, more
difficult to diagnose. Since these bits aren't exported anyway, this
change makes it more explicit that the bits aren't MSR-related in SRR1.
r261095:
Fix 32-bit signal handling on ppc64. This was broken when the
PSL_USERSTATIC macro was changed. Since copying 64-bit srr1 into
32-bit srr1 drops the upper 32 bits, any bits set in the context were
dropped, meaning the context check fails. Since 32-bit set_context()
can't change those bits anyway, copy the ones from the current context
(td->td_frame) before calling set_context().
Approved by: re
Relnotes: yes (Affects 10-stable, but not 10.0-release)
Modified:
stable/10/sys/powerpc/include/psl.h
stable/10/sys/powerpc/powerpc/exec_machdep.c
Directory Properties:
stable/10/ (props changed)
Modified: stable/10/sys/powerpc/include/psl.h
==============================================================================
--- stable/10/sys/powerpc/include/psl.h Fri Sep 5 14:58:24 2014 (r271170)
+++ stable/10/sys/powerpc/include/psl.h Fri Sep 5 15:13:41 2014 (r271171)
@@ -86,17 +86,20 @@
/* Initial kernel MSR, use IS=1 ad DS=1. */
#define PSL_KERNSET_INIT (PSL_IS | PSL_DS)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
+#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(BOOKE_PPC4XX)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
+#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(AIM)
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#else
#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#endif
+#define PSL_SRR1_MASK 0x783f0000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
#endif
#define PSL_USERSET (PSL_KERNSET | PSL_PR)
-#define PSL_USERSTATIC ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1)
+#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
#endif /* _MACHINE_PSL_H_ */
Modified: stable/10/sys/powerpc/powerpc/exec_machdep.c
==============================================================================
--- stable/10/sys/powerpc/powerpc/exec_machdep.c Fri Sep 5 14:58:24 2014 (r271170)
+++ stable/10/sys/powerpc/powerpc/exec_machdep.c Fri Sep 5 15:13:41 2014 (r271171)
@@ -752,6 +752,7 @@ set_mcontext32(struct thread *td, const
memcpy(mcp64.mc_av,mcp->mc_av,sizeof(mcp64.mc_av));
for (i = 0; i < 42; i++)
mcp64.mc_frame[i] = mcp->mc_frame[i];
+ mcp64.mc_srr1 |= (td->td_frame->srr1 & 0xFFFFFFFF00000000ULL);
memcpy(mcp64.mc_fpreg,mcp->mc_fpreg,sizeof(mcp64.mc_fpreg));
error = set_mcontext(td, &mcp64);
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