svn commit: r273041 - in head/sys/arm/ti: . omap3
Andrew Turner
andrew at FreeBSD.org
Mon Oct 13 15:35:11 UTC 2014
Author: andrew
Date: Mon Oct 13 15:35:08 2014
New Revision: 273041
URL: https://svnweb.freebsd.org/changeset/base/273041
Log:
Start removing the omap3 support. In base it was only ever a header and a
few changes to drivers, no kernel config was added. As the SoCs are quite
old and the code is unmaintained start the process of removing support by
deleting the header file and code that depends on it along with the macro
SOC_OMAP3. Other Ti SoCs shouldn't be affected, other than for us to have
less code to maintain.
Differential Revision: https://reviews.freebsd.org/D936
Reviewed by: rpaulo, loos
Deleted:
head/sys/arm/ti/omap3/omap3_reg.h
Modified:
head/sys/arm/ti/ti_cpuid.c
head/sys/arm/ti/ti_cpuid.h
head/sys/arm/ti/ti_gpio.c
head/sys/arm/ti/ti_i2c.c
head/sys/arm/ti/ti_mmchs.c
head/sys/arm/ti/ti_sdhci.c
Modified: head/sys/arm/ti/ti_cpuid.c
==============================================================================
--- head/sys/arm/ti/ti_cpuid.c Mon Oct 13 15:33:27 2014 (r273040)
+++ head/sys/arm/ti/ti_cpuid.c Mon Oct 13 15:35:08 2014 (r273041)
@@ -49,7 +49,6 @@ __FBSDID("$FreeBSD$");
#include <arm/ti/ti_cpuid.h>
#include <arm/ti/omap4/omap4_reg.h>
-#include <arm/ti/omap3/omap3_reg.h>
#include <arm/ti/am335x/am335x_reg.h>
#define OMAP4_STD_FUSE_DIE_ID_0 0x2200
@@ -198,67 +197,6 @@ omap4_get_revision(void)
}
}
-/**
- * omap3_get_revision - determines omap3 revision
- *
- * Reads the registers to determine the revision of the chip we are currently
- * running on. Stores the information in global variables.
- *
- * WARNING: This function currently only really works for OMAP3530 devices.
- *
- *
- *
- */
-static void
-omap3_get_revision(void)
-{
- uint32_t id_code;
- uint32_t revision;
- uint32_t hawkeye;
- bus_space_handle_t bsh;
-
- /* The chip revsion is read from the device identification registers and
- * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to
- * 0x4A00_2218. This is part of the L4_CORE memory range and should have
- * been mapped in by the machdep.c code.
- *
- * CONTROL_IDCODE 0x4830 A204 (this is the only one we need)
- *
- *
- */
- bus_space_map(fdtbus_bs_tag, OMAP35XX_L4_WAKEUP_HWBASE, 0x10000, 0, &bsh);
- id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP3_ID_CODE);
- bus_space_unmap(fdtbus_bs_tag, bsh, 0x10000);
-
- hawkeye = ((id_code >> 12) & 0xffff);
- revision = ((id_code >> 28) & 0xf);
-
- switch (hawkeye) {
- case 0xB6D6:
- chip_revision = OMAP3350_REV_ES1_0;
- break;
- case 0xB7AE:
- if (revision == 1)
- chip_revision = OMAP3530_REV_ES2_0;
- else if (revision == 2)
- chip_revision = OMAP3530_REV_ES2_1;
- else if (revision == 3)
- chip_revision = OMAP3530_REV_ES3_0;
- else if (revision == 4)
- chip_revision = OMAP3530_REV_ES3_1;
- else if (revision == 7)
- chip_revision = OMAP3530_REV_ES3_1_2;
- break;
- default:
- /* Default to the latest revision if we can't determine type */
- chip_revision = OMAP3530_REV_ES3_1_2;
- break;
- }
- printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n",
- OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision),
- OMAP_REV_MINOR(chip_revision));
-}
-
static void
am335x_get_revision(void)
{
@@ -313,9 +251,6 @@ static void
ti_cpu_ident(void *dummy)
{
switch(ti_chip()) {
- case CHIP_OMAP_3:
- omap3_get_revision();
- break;
case CHIP_OMAP_4:
omap4_get_revision();
break;
Modified: head/sys/arm/ti/ti_cpuid.h
==============================================================================
--- head/sys/arm/ti/ti_cpuid.h Mon Oct 13 15:33:27 2014 (r273040)
+++ head/sys/arm/ti/ti_cpuid.h Mon Oct 13 15:35:08 2014 (r273041)
@@ -67,16 +67,13 @@
#define AM335X_DEVREV(x) ((x) >> 28)
-#define CHIP_OMAP_3 0
-#define CHIP_OMAP_4 1
-#define CHIP_AM335X 2
+#define CHIP_OMAP_4 0
+#define CHIP_AM335X 1
static __inline int ti_chip(void)
{
#if defined(SOC_OMAP4)
return CHIP_OMAP_4;
-#elif defined(SOC_OMAP3)
- return CHIP_OMAP_3;
#elif defined(SOC_TI_AM335X)
return CHIP_AM335X;
#else
Modified: head/sys/arm/ti/ti_gpio.c
==============================================================================
--- head/sys/arm/ti/ti_gpio.c Mon Oct 13 15:33:27 2014 (r273040)
+++ head/sys/arm/ti/ti_gpio.c Mon Oct 13 15:35:08 2014 (r273041)
@@ -70,32 +70,7 @@ __FBSDID("$FreeBSD$");
/* Register definitions */
#define TI_GPIO_REVISION 0x0000
#define TI_GPIO_SYSCONFIG 0x0010
-#if defined(SOC_OMAP3)
-#define TI_GPIO_SYSSTATUS 0x0014
-#define TI_GPIO_IRQSTATUS1 0x0018
-#define TI_GPIO_IRQENABLE1 0x001C
-#define TI_GPIO_WAKEUPENABLE 0x0020
-#define TI_GPIO_IRQSTATUS2 0x0028
-#define TI_GPIO_IRQENABLE2 0x002C
-#define TI_GPIO_CTRL 0x0030
-#define TI_GPIO_OE 0x0034
-#define TI_GPIO_DATAIN 0x0038
-#define TI_GPIO_DATAOUT 0x003C
-#define TI_GPIO_LEVELDETECT0 0x0040
-#define TI_GPIO_LEVELDETECT1 0x0044
-#define TI_GPIO_RISINGDETECT 0x0048
-#define TI_GPIO_FALLINGDETECT 0x004C
-#define TI_GPIO_DEBOUNCENABLE 0x0050
-#define TI_GPIO_DEBOUNCINGTIME 0x0054
-#define TI_GPIO_CLEARIRQENABLE1 0x0060
-#define TI_GPIO_SETIRQENABLE1 0x0064
-#define TI_GPIO_CLEARIRQENABLE2 0x0070
-#define TI_GPIO_SETIRQENABLE2 0x0074
-#define TI_GPIO_CLEARWKUENA 0x0080
-#define TI_GPIO_SETWKUENA 0x0084
-#define TI_GPIO_CLEARDATAOUT 0x0090
-#define TI_GPIO_SETDATAOUT 0x0094
-#elif defined(SOC_OMAP4) || defined(SOC_TI_AM335X)
+#if defined(SOC_OMAP4) || defined(SOC_TI_AM335X)
#define TI_GPIO_IRQSTATUS_RAW_0 0x0024
#define TI_GPIO_IRQSTATUS_RAW_1 0x0028
#define TI_GPIO_IRQSTATUS_0 0x002C
@@ -131,10 +106,6 @@ __FBSDID("$FreeBSD$");
#endif
/* Other SoC Specific definitions */
-#define OMAP3_MAX_GPIO_BANKS 6
-#define OMAP3_FIRST_GPIO_BANK 1
-#define OMAP3_INTR_PER_BANK 1
-#define OMAP3_GPIO_REV 0x00000025
#define OMAP4_MAX_GPIO_BANKS 6
#define OMAP4_FIRST_GPIO_BANK 1
#define OMAP4_INTR_PER_BANK 1
@@ -152,10 +123,6 @@ static u_int
ti_max_gpio_banks(void)
{
switch(ti_chip()) {
-#ifdef SOC_OMAP3
- case CHIP_OMAP_3:
- return (OMAP3_MAX_GPIO_BANKS);
-#endif
#ifdef SOC_OMAP4
case CHIP_OMAP_4:
return (OMAP4_MAX_GPIO_BANKS);
@@ -172,10 +139,6 @@ static u_int
ti_max_gpio_intrs(void)
{
switch(ti_chip()) {
-#ifdef SOC_OMAP3
- case CHIP_OMAP_3:
- return (OMAP3_MAX_GPIO_BANKS * OMAP3_INTR_PER_BANK);
-#endif
#ifdef SOC_OMAP4
case CHIP_OMAP_4:
return (OMAP4_MAX_GPIO_BANKS * OMAP4_INTR_PER_BANK);
@@ -192,10 +155,6 @@ static u_int
ti_first_gpio_bank(void)
{
switch(ti_chip()) {
-#ifdef SOC_OMAP3
- case CHIP_OMAP_3:
- return (OMAP3_FIRST_GPIO_BANK);
-#endif
#ifdef SOC_OMAP4
case CHIP_OMAP_4:
return (OMAP4_FIRST_GPIO_BANK);
@@ -212,10 +171,6 @@ static uint32_t
ti_gpio_rev(void)
{
switch(ti_chip()) {
-#ifdef SOC_OMAP3
- case CHIP_OMAP_3:
- return (OMAP3_GPIO_REV);
-#endif
#ifdef SOC_OMAP4
case CHIP_OMAP_4:
return (OMAP4_GPIO_REV);
Modified: head/sys/arm/ti/ti_i2c.c
==============================================================================
--- head/sys/arm/ti/ti_i2c.c Mon Oct 13 15:33:27 2014 (r273040)
+++ head/sys/arm/ti/ti_i2c.c Mon Oct 13 15:35:08 2014 (r273041)
@@ -111,10 +111,6 @@ struct ti_i2c_clock_config
uint8_t hssclh; /* High Speed mode SCL high time */
};
-#if defined(SOC_OMAP3)
-#error "Unsupported SoC"
-#endif
-
#if defined(SOC_OMAP4)
static struct ti_i2c_clock_config ti_omap4_i2c_clock_configs[] = {
{ IIC_UNKNOWN, 100000, 23, 13, 15, 0, 0},
Modified: head/sys/arm/ti/ti_mmchs.c
==============================================================================
--- head/sys/arm/ti/ti_mmchs.c Mon Oct 13 15:33:27 2014 (r273040)
+++ head/sys/arm/ti/ti_mmchs.c Mon Oct 13 15:35:08 2014 (r273041)
@@ -1621,9 +1621,7 @@ ti_mmchs_activate(device_t dev)
goto errout;
/* Set the register offset */
- if (ti_chip() == CHIP_OMAP_3)
- sc->sc_reg_off = OMAP3_MMCHS_REG_OFFSET;
- else if (ti_chip() == CHIP_OMAP_4)
+ if (ti_chip() == CHIP_OMAP_4)
sc->sc_reg_off = OMAP4_MMCHS_REG_OFFSET;
else if (ti_chip() == CHIP_AM335X)
sc->sc_reg_off = AM335X_MMCHS_REG_OFFSET;
Modified: head/sys/arm/ti/ti_sdhci.c
==============================================================================
--- head/sys/arm/ti/ti_sdhci.c Mon Oct 13 15:33:27 2014 (r273040)
+++ head/sys/arm/ti/ti_sdhci.c Mon Oct 13 15:35:08 2014 (r273041)
@@ -494,9 +494,7 @@ ti_sdhci_attach(device_t dev)
* Set the offset from the device's memory start to the MMCHS registers.
* Also for OMAP4 disable high speed mode due to erratum ID i626.
*/
- if (ti_chip() == CHIP_OMAP_3)
- sc->mmchs_reg_off = OMAP3_MMCHS_REG_OFFSET;
- else if (ti_chip() == CHIP_OMAP_4) {
+ if (ti_chip() == CHIP_OMAP_4) {
sc->mmchs_reg_off = OMAP4_MMCHS_REG_OFFSET;
sc->disable_highspeed = true;
} else if (ti_chip() == CHIP_AM335X)
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