svn commit: r274602 - head/sys/arm/arm
Ian Lepore
ian at FreeBSD.org
Sun Nov 16 20:55:52 UTC 2014
Author: ian
Date: Sun Nov 16 20:55:51 2014
New Revision: 274602
URL: https://svnweb.freebsd.org/changeset/base/274602
Log:
Do not do a cache invalidate on a PREREAD sync that is also a PREWRITE sync.
The PREWRITE handling does a writeback of any dirty cachelines, so there's
no danger of an eviction during the DMA corrupting the buffer. There will
be an invalidate done during POSTREAD, so doing it before the read too is
wasted time.
Modified:
head/sys/arm/arm/busdma_machdep-v6.c
Modified: head/sys/arm/arm/busdma_machdep-v6.c
==============================================================================
--- head/sys/arm/arm/busdma_machdep-v6.c Sun Nov 16 20:42:30 2014 (r274601)
+++ head/sys/arm/arm/busdma_machdep-v6.c Sun Nov 16 20:55:51 2014 (r274602)
@@ -1345,7 +1345,7 @@ _bus_dmamap_sync(bus_dma_tag_t dmat, bus
dmat->bounce_zone->total_bounced++;
}
- if (op & BUS_DMASYNC_PREREAD) {
+ if ((op & BUS_DMASYNC_PREREAD) && !(op & BUS_DMASYNC_PREWRITE)) {
bpage = STAILQ_FIRST(&map->bpages);
while (bpage != NULL) {
cpu_dcache_inv_range((vm_offset_t)bpage->vaddr,
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