svn commit: r260165 - head/sys/dev/ahci

Zbigniew Bodek zbb at semihalf.com
Thu Jan 2 12:27:39 UTC 2014


On 01.01.2014 21:32, Konstantin Belousov wrote:
> On Wed, Jan 01, 2014 at 08:26:08PM +0000, Zbigniew Bodek wrote:
>> Author: zbb Date: Wed Jan  1 20:26:08 2014 New Revision: 260165 
>> URL: http://svnweb.freebsd.org/changeset/base/260165
>> 
>> Log: Use only mapped BIOs on ARM
>> 
>> Using unmapped BIOs causes failure inside bus_dmamap_sync, since
>>  this function requires valid MVA address, which is not present
>> if mapping is not set up.
>> 
>> Submitted by:	Wojciech Macek <wma at semihalf.com> Obtained from: 
>> Semihalf
>> 
>> Modified: head/sys/dev/ahci/ahci.c
>> 
>> Modified: head/sys/dev/ahci/ahci.c 
>> ==============================================================================
>>
>>
>> 
--- head/sys/dev/ahci/ahci.c	Wed Jan  1 20:22:29 2014	(r260164)
>> +++ head/sys/dev/ahci/ahci.c	Wed Jan  1 20:26:08 2014	(r260165) 
>> @@ -3066,7 +3066,15 @@ ahciaction(struct cam_sim *sim, union cc 
>> if (ch->caps & AHCI_CAP_SPM) cpi->hba_inquiry |= PI_SATAPM; 
>> cpi->target_sprt = 0; +#ifdef __arm__ +		/* +		 * Do not use 
>> unmapped buffers on ARM. Doing so will cause +		 * failure
>> inside bus_dmamap_sync due to lack of VA. +		 */ +		cpi->hba_misc
>> = PIM_SEQSCAN; +#else cpi->hba_misc = PIM_SEQSCAN | PIM_UNMAPPED;
>>  +#endif cpi->hba_eng_cnt = 0; if (ch->caps & AHCI_CAP_SPM) 
>> cpi->max_target = 15;
> 
> I think this is wrong. If bus_dmamap_sync(9) is not functional on 
> arm, then unmapped io should be disabled on arm unconditionally, 
> using unmapped_buf_allowed.  Why ahci(4) is special in this
> regard, leaving other controllers broken for arm ?
> 

Hello Konstantin.

Thanks for pointing that out. You are right, we didn't know about
unmapped_buf_allowed flag. bus_dmamap_sync() is functional on ARM
however it needs virtual address therefore unmapped_buf_allowed should
be set to 0 on ARM (it is set to 1 now).

I will revert this commit but we will need some time to test the other
solution.

Best regards
zbb


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