svn commit: r262483 - in head/sys: arm/freescale/vybrid boot/fdt/dts

Ruslan Bukin br at FreeBSD.org
Tue Feb 25 17:02:13 UTC 2014


Author: br
Date: Tue Feb 25 17:02:11 2014
New Revision: 262483
URL: http://svnweb.freebsd.org/changeset/base/262483

Log:
  - Pin configuration is a complete iomux register now and includes
    drive strength, pull mode, mux mode, speed, etc.
  - Add i2c devices to the tree
  - Add IPG clock

Modified:
  head/sys/arm/freescale/vybrid/vf_ccm.c
  head/sys/arm/freescale/vybrid/vf_iomuxc.c
  head/sys/boot/fdt/dts/vybrid-colibri-vf50.dts
  head/sys/boot/fdt/dts/vybrid-cosmic.dts
  head/sys/boot/fdt/dts/vybrid-quartz.dts
  head/sys/boot/fdt/dts/vybrid.dtsi

Modified: head/sys/arm/freescale/vybrid/vf_ccm.c
==============================================================================
--- head/sys/arm/freescale/vybrid/vf_ccm.c	Tue Feb 25 15:22:40 2014	(r262482)
+++ head/sys/arm/freescale/vybrid/vf_ccm.c	Tue Feb 25 17:02:11 2014	(r262483)
@@ -164,6 +164,18 @@ struct clk {
 	uint32_t	sel_val;
 };
 
+static struct clk ipg_clk = {
+	.reg = CCM_CACRR,
+	.enable_reg = 0,
+	.div_mask = IPG_CLK_DIV_MASK,
+	.div_shift = IPG_CLK_DIV_SHIFT,
+	.div_val = 1, /* Divide by 2 */
+	.sel_reg = 0,
+	.sel_mask = 0,
+	.sel_shift = 0,
+	.sel_val = 0,
+};
+
 /*
   PLL4 clock divider (before switching the clocks should be gated)
   000 Divide by 1 (only if PLL frequency less than or equal to 650 MHz)
@@ -310,6 +322,7 @@ struct clock_entry {
 };
 
 static struct clock_entry clock_map[] = {
+	{"ipg",		&ipg_clk},
 	{"pll4",	&pll4_clk},
 	{"sai3",	&sai3_clk},
 	{"cko1",	&cko1_clk},

Modified: head/sys/arm/freescale/vybrid/vf_iomuxc.c
==============================================================================
--- head/sys/arm/freescale/vybrid/vf_iomuxc.c	Tue Feb 25 15:22:40 2014	(r262482)
+++ head/sys/arm/freescale/vybrid/vf_iomuxc.c	Tue Feb 25 17:02:11 2014	(r262483)
@@ -56,21 +56,42 @@ __FBSDID("$FreeBSD$");
 #include <arm/freescale/vybrid/vf_iomuxc.h>
 #include <arm/freescale/vybrid/vf_common.h>
 
-#define	IBE		(1 << 0) /* Input Buffer Enable Field */
-#define	OBE		(1 << 1) /* Output Buffer Enable Field. */
-#define	PUE		(1 << 2) /* Pull / Keep Select Field. */
-#define	PKE		(1 << 3) /* Pull / Keep Enable Field. */
-#define	PUS_MASK	(3 << 4) /* Pull Up / Down Config Field. */
-#define	DSE_MASK	(7 << 6) /* Drive Strength Field. */
-#define	HYS		(1 << 9) /* Hysteresis Enable Field */
-
 #define	MUX_MODE_MASK		7
 #define	MUX_MODE_SHIFT		20
 #define	MUX_MODE_GPIO		0
 #define	MUX_MODE_VBUS_EN_OTG	2
 
-#define	PUS_22_KOHM_PULL_UP	(3 << 4)
-#define	DSE_25_OHM		(6 << 6)
+#define	IBE		(1 << 0)	/* Input Buffer Enable Field */
+#define	OBE		(1 << 1)	/* Output Buffer Enable Field. */
+#define	PUE		(1 << 2)	/* Pull / Keep Select Field. */
+#define	PKE		(1 << 3)	/* Pull / Keep Enable Field. */
+#define	HYS		(1 << 9)	/* Hysteresis Enable Field */
+#define	ODE		(1 << 10)	/* Open Drain Enable Field. */
+#define	SRE		(1 << 11)	/* Slew Rate Field. */
+
+#define	SPEED_SHIFT		12
+#define	SPEED_MASK		0x3
+#define	SPEED_LOW		0	/* 50 MHz */
+#define	SPEED_MEDIUM		0x1	/* 100 MHz */
+#define	SPEED_HIGH		0x3	/* 200 MHz */
+
+#define	PUS_SHIFT		4	/* Pull Up / Down Config Field Shift */
+#define	PUS_MASK		0x3
+#define	PUS_100_KOHM_PULL_DOWN	0
+#define	PUS_47_KOHM_PULL_UP	0x1
+#define	PUS_100_KOHM_PULL_UP	0x2
+#define	PUS_22_KOHM_PULL_UP	0x3
+
+#define	DSE_SHIFT		6	/* Drive Strength Field Shift */
+#define	DSE_MASK		0x7
+#define	DSE_DISABLED		0	/* Output driver disabled */
+#define	DSE_150_OHM		0x1
+#define	DSE_75_OHM		0x2
+#define	DSE_50_OHM		0x3
+#define	DSE_37_OHM		0x4
+#define	DSE_30_OHM		0x5
+#define	DSE_25_OHM		0x6
+#define	DSE_20_OHM		0x7
 
 #define	MAX_MUX_LEN		1024
 
@@ -101,19 +122,6 @@ iomuxc_probe(device_t dev)
 }
 
 static int
-configure_pad(struct iomuxc_softc *sc, int pad, int mux_mode)
-{
-	int reg;
-
-	reg = READ4(sc, pad);
-	reg &= ~(MUX_MODE_MASK << MUX_MODE_SHIFT);
-	reg |= (mux_mode << MUX_MODE_SHIFT);
-	WRITE4(sc, pad, reg);
-
-	return (0);
-}
-
-static int
 pinmux_set(struct iomuxc_softc *sc)
 {
 	phandle_t child, parent, root;
@@ -121,7 +129,7 @@ pinmux_set(struct iomuxc_softc *sc)
 	int len;
 	int values;
 	int pin;
-	int mux_mode;
+	int pin_cfg;
 	int i;
 
 	root = OF_finddevice("/");
@@ -146,12 +154,12 @@ pinmux_set(struct iomuxc_softc *sc)
 			values = len / (sizeof(uint32_t));
 			for (i = 0; i < values; i += 2) {
 				pin = fdt32_to_cpu(iomux_config[i]);
-				mux_mode = fdt32_to_cpu(iomux_config[i+1]);
+				pin_cfg = fdt32_to_cpu(iomux_config[i+1]);
 #if 0
-				device_printf(sc->dev, "Set pin %d to ALT%d\n",
-				    pin, mux_mode);
+				device_printf(sc->dev, "Set pin %d to 0x%08x\n",
+				    pin, pin_cfg);
 #endif
-				configure_pad(sc, IOMUXC(pin), mux_mode);
+				WRITE4(sc, IOMUXC(pin), pin_cfg);
 			}
 		}
 
@@ -169,7 +177,6 @@ static int
 iomuxc_attach(device_t dev)
 {
 	struct iomuxc_softc *sc;
-	int reg;
 
 	sc = device_get_softc(dev);
 	sc->dev = dev;
@@ -183,11 +190,6 @@ iomuxc_attach(device_t dev)
 	sc->bst = rman_get_bustag(sc->tmr_res[0]);
 	sc->bsh = rman_get_bushandle(sc->tmr_res[0]);
 
-	/* USB */
-	configure_pad(sc, IOMUXC_PTA17, MUX_MODE_VBUS_EN_OTG);
-	reg = (PKE | PUE | PUS_22_KOHM_PULL_UP | DSE_25_OHM | OBE);
-	WRITE4(sc, IOMUXC_PTA7, reg);
-
 	pinmux_set(sc);
 
 	return (0);

Modified: head/sys/boot/fdt/dts/vybrid-colibri-vf50.dts
==============================================================================
--- head/sys/boot/fdt/dts/vybrid-colibri-vf50.dts	Tue Feb 25 15:22:40 2014	(r262482)
+++ head/sys/boot/fdt/dts/vybrid-colibri-vf50.dts	Tue Feb 25 17:02:11 2014	(r262483)
@@ -45,17 +45,26 @@
 
 		fec1: ethernet at 400D1000 {
 			status = "okay";
-			iomux_config = < 54 0x1 55 0x1
-					 56 0x1 57 0x1
-					 58 0x1 59 0x1
-					 60 0x1 61 0x1
-					 62 0x1  0 0x1 >;
+			iomux_config = < 54 0x103192
+					 55 0x103193
+					 56 0x103191
+					 57 0x103191
+					 58 0x103191
+					 59 0x103191
+					 60 0x103192
+					 61 0x103192
+					 62 0x103192
+					  0 0x103191 >;
 		};
 
 		sai3: sai at 40032000 {
 			status = "okay";
 		};
 
+		i2c0: i2c at 40066000 {
+			status = "okay";
+		};
+
 		adc0: adc at 4003B000 {
 			status = "okay";
 		};

Modified: head/sys/boot/fdt/dts/vybrid-cosmic.dts
==============================================================================
--- head/sys/boot/fdt/dts/vybrid-cosmic.dts	Tue Feb 25 15:22:40 2014	(r262482)
+++ head/sys/boot/fdt/dts/vybrid-cosmic.dts	Tue Feb 25 17:02:11 2014	(r262483)
@@ -45,11 +45,16 @@
 
 		fec1: ethernet at 400D1000 {
 			status = "okay";
-			iomux_config = < 54 0x1 55 0x1
-					 56 0x1 57 0x1
-					 58 0x1 59 0x1
-					 60 0x1 61 0x1
-					 62 0x1  0 0x2 >;
+			iomux_config = < 54 0x103192
+					 55 0x103193
+					 56 0x103191
+					 57 0x103191
+					 58 0x103191
+					 59 0x103191
+					 60 0x103192
+					 61 0x103192
+					 62 0x103192
+					  0 0x203191 >;
 		};
 
 		esai: esai at 40062000 {

Modified: head/sys/boot/fdt/dts/vybrid-quartz.dts
==============================================================================
--- head/sys/boot/fdt/dts/vybrid-quartz.dts	Tue Feb 25 15:22:40 2014	(r262482)
+++ head/sys/boot/fdt/dts/vybrid-quartz.dts	Tue Feb 25 17:02:11 2014	(r262483)
@@ -45,11 +45,16 @@
 
 		fec1: ethernet at 400D1000 {
 			status = "okay";
-			iomux_config = < 54 0x1 55 0x1
-					 56 0x1 57 0x1
-					 58 0x1 59 0x1
-					 60 0x1 61 0x1
-					 62 0x1  0 0x2 >;
+			iomux_config = < 54 0x103192
+					 55 0x103193
+					 56 0x103191
+					 57 0x103191
+					 58 0x103191
+					 59 0x103191
+					 60 0x103192
+					 61 0x103192
+					 62 0x103192
+					  0 0x203191 >;
 		};
 
 		edma1: edma at 40098000 {

Modified: head/sys/boot/fdt/dts/vybrid.dtsi
==============================================================================
--- head/sys/boot/fdt/dts/vybrid.dtsi	Tue Feb 25 15:22:40 2014	(r262482)
+++ head/sys/boot/fdt/dts/vybrid.dtsi	Tue Feb 25 17:02:11 2014	(r262483)
@@ -205,9 +205,12 @@
 			clock-frequency = <50000000>;
 			status = "disabled";
 			clock_names = "esdhc1";
-			iomux_config = < 14 0x5 15 0x5
-					 16 0x5 17 0x5
-					 18 0x5 19 0x5 >;
+			iomux_config = < 14 0x500060
+					 15 0x500060
+					 16 0x500060
+					 17 0x500060
+					 18 0x500060
+					 19 0x500060 >;
 		};
 
 		serial0: serial at 40027000 {
@@ -237,6 +240,8 @@
 			      < 0x40050800 0x100 >; /* phy */
 			interrupts = < 107 >;
 			interrupt-parent = <&GIC>;
+			iomux_config = < 134 0x0001be
+					   7 0x200060 >;
 		};
 
 		usb at 400b4000 {
@@ -246,6 +251,8 @@
 			      < 0x40050C00 0x100 >; /* phy */
 			interrupts = < 108 >;
 			interrupt-parent = <&GIC>;
+			iomux_config = < 134 0x0001be
+					   7 0x200060 >;
 		};
 
 		fec0: ethernet at 400D0000 {
@@ -257,11 +264,15 @@
 			phy-disable-preamble;
 			status = "disabled";
 			clock_names = "enet";
-			iomux_config = < 45 0x1 46 0x1
-					 47 0x1 48 0x1
-					 49 0x1 50 0x1
-					 51 0x1 52 0x1
-					 53 0x1 >;
+			iomux_config = < 45 0x100061
+					 46 0x100061
+					 47 0x100061
+					 48 0x100060
+					 49 0x100060
+					 50 0x100060
+					 51 0x100060
+					 52 0x100060
+					 53 0x100060 >;
 		};
 
 		fec1: ethernet at 400D1000 {
@@ -273,11 +284,15 @@
 			phy-disable-preamble;
 			status = "disabled";
 			clock_names = "enet";
-			iomux_config = < 54 0x1 55 0x1
-					 56 0x1 57 0x1
-					 58 0x1 59 0x1
-					 60 0x1 61 0x1
-					 62 0x1 >;
+			iomux_config = < 54 0x103192
+					 55 0x103193
+					 56 0x103191
+					 57 0x103191
+					 58 0x103191
+					 59 0x103191
+					 60 0x103192
+					 61 0x103192
+					 62 0x103192 >;
 		};
 
 		sai0: sai at 4002F000 {
@@ -315,10 +330,10 @@
 			edma-src-transmit = < 9 >;
 			edma-mux-group = < 1 >;
 			clock_names = "sai3", "cko1";
-			iomux_config = < 16 0x2
-					 19 0x2
-					 21 0x2
-					 40 0x4 >; /* CKO1 */
+			iomux_config = < 16 0x200060
+					 19 0x200060
+					 21 0x200060
+					 40 0x400061 >; /* CKO1 */
 		};
 
 		esai: esai at 40062000 {
@@ -328,11 +343,16 @@
 			interrupt-parent = <&GIC>;
 			status = "disabled";
 			clock_names = "esai";
-			iomux_config = < 45 0x4 46 0x4
-					 47 0x4 48 0x4
-					 49 0x4 50 0x4
-					 51 0x4 52 0x4
-					 78 0x3 40 0x4>;
+			iomux_config = < 45 0x400061
+					 46 0x400061
+					 47 0x400061
+					 48 0x400060
+					 49 0x400060
+					 50 0x400060
+					 51 0x400060
+					 52 0x400060
+					 78 0x3038df
+					 40 0x400061 >;
 		};
 
 		spi0: spi at 4002C000 {
@@ -341,9 +361,11 @@
 			interrupts = < 99 >;
 			interrupt-parent = <&GIC>;
 			status = "disabled";
-			iomux_config = < 40 0x1 41 0x1
-					 42 0x1 43 0x1
-					 44 0x1 >;
+			iomux_config = < 40 0x100061
+					 41 0x100061
+					 42 0x100060
+					 43 0x100060
+					 44 0x100061 >;
 		};
 
 		spi1: spi at 4002D000 {
@@ -370,6 +392,43 @@
 			status = "disabled";
 		};
 
+		i2c0: i2c at 40066000 {
+			compatible = "fsl,mvf600-i2c";
+			reg = <0x40066000 0x1000>;
+			interrupts = < 103 >;
+			interrupt-parent = <&GIC>;
+			status = "disabled";
+			clock_names = "ipg";
+			iomux_config = <  36 0x2034d3
+					  37 0x2034d3
+					 207 0x1
+					 208 0x1 >;
+		};
+
+		i2c1: i2c at 40067000 {
+			compatible = "fsl,mvf600-i2c";
+			reg = <0x40067000 0x1000>;
+			interrupts = < 104 >;
+			interrupt-parent = <&GIC>;
+			status = "disabled";
+		};
+
+		i2c2: i2c at 400E6000 {
+			compatible = "fsl,mvf600-i2c";
+			reg = <0x400E6000 0x1000>;
+			interrupts = < 105 >;
+			interrupt-parent = <&GIC>;
+			status = "disabled";
+		};
+
+		i2c3: i2c at 400E7000 {
+			compatible = "fsl,mvf600-i2c";
+			reg = <0x400E7000 0x1000>;
+			interrupts = < 106 >;
+			interrupt-parent = <&GIC>;
+			status = "disabled";
+		};
+
 		adc0: adc at 4003B000 {
 			compatible = "fsl,mvf600-adc";
 			reg = <0x4003B000 0x1000>;
@@ -399,21 +458,35 @@
 			interrupt-parent = <&GIC>;
 			status = "disabled";
 			clock_names = "dcu0";
-			iomux_config = < 105 0x1 106 0x1
-					 107 0x1 108 0x1
-					 109 0x1 110 0x1
-					 111 0x1 112 0x1
-					 113 0x1 114 0x1
-					 115 0x1 116 0x1
-					 117 0x1 118 0x1
-					 119 0x1 120 0x1
-					 121 0x1 122 0x1
-					 123 0x1 124 0x1
-					 125 0x1 126 0x1
-					 127 0x1 128 0x1
-					 129 0x1 130 0x1
-					 131 0x1 132 0x1
-					 133 0x1 >;
+			iomux_config = < 105 0x100044
+					 106 0x100044
+					 107 0x100060
+					 108 0x100060
+					 109 0x100060
+					 110 0x100060
+					 111 0x100060
+					 112 0x100060
+					 113 0x100060
+					 114 0x100060
+					 115 0x100060
+					 116 0x100060
+					 117 0x100060
+					 118 0x100060
+					 119 0x100060
+					 120 0x100060
+					 121 0x100060
+					 122 0x100060
+					 123 0x100060
+					 124 0x100060
+					 125 0x100060
+					 126 0x100060
+					 127 0x100060
+					 128 0x100060
+					 129 0x100060
+					 130 0x100060
+					 131 0x100060
+					 132 0x100060
+					 133 0x100060 >;
 		};
 	};
 };


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