svn commit: r276249 - head/sys/arm/ti/am335x
Adrian Chadd
adrian at freebsd.org
Fri Dec 26 17:59:04 UTC 2014
Holy crap, great catch!
-adrian
On 26 December 2014 at 09:45, Luiz Otavio O Souza <loos at freebsd.org> wrote:
> Author: loos
> Date: Fri Dec 26 17:45:49 2014
> New Revision: 276249
> URL: https://svnweb.freebsd.org/changeset/base/276249
>
> Log:
> Fix the musb initialization sequence on AM335x.
>
> According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the
> USB reset pulse has an undocumented duration of 200ns and during this
> period the module must not be acessed.
>
> We wait for 100us to take into account for some imprecision of the early
> DELAY() loop.
>
> This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at
> boot while resetting the musb subsystem.
>
> While here, enable the USB subsystem clock before the first access.
>
> Discussed with: ian, adrian
> MFC after: 2 weeks
>
> Modified:
> head/sys/arm/ti/am335x/am335x_usbss.c
>
> Modified: head/sys/arm/ti/am335x/am335x_usbss.c
> ==============================================================================
> --- head/sys/arm/ti/am335x/am335x_usbss.c Fri Dec 26 15:04:03 2014 (r276248)
> +++ head/sys/arm/ti/am335x/am335x_usbss.c Fri Dec 26 17:45:49 2014 (r276249)
> @@ -288,21 +288,30 @@ musbotg_attach(device_t dev)
> return (ENXIO);
> }
>
> + /* Enable device clocks. */
> + ti_prcm_clk_enable(MUSB0_CLK);
> +
> /*
> - * Reset USBSS, USB0 and USB1
> + * Reset USBSS, USB0 and USB1.
> + * The registers of USB subsystem must not be accessed while the
> + * reset pulse is active (200ns).
> */
> + USBSS_WRITE4(sc, USBSS_SYSCONFIG, USBSS_SYSCONFIG_SRESET);
> + DELAY(100);
> + i = 10;
> + while (USBSS_READ4(sc, USBSS_SYSCONFIG) & USBSS_SYSCONFIG_SRESET) {
> + DELAY(100);
> + if (i-- == 0) {
> + device_printf(dev, "reset timeout.\n");
> + return (ENXIO);
> + }
> + }
> +
> + /* Read the module revision. */
> rev = USBSS_READ4(sc, USBSS_REVREG);
> device_printf(dev, "TI AM335X USBSS v%d.%d.%d\n",
> (rev >> 8) & 7, (rev >> 6) & 3, rev & 63);
>
> - ti_prcm_clk_enable(MUSB0_CLK);
> -
> - USBSS_WRITE4(sc, USBSS_SYSCONFIG,
> - USBSS_SYSCONFIG_SRESET);
> - while (USBSS_READ4(sc, USBSS_SYSCONFIG) &
> - USBSS_SYSCONFIG_SRESET)
> - ;
> -
> err = bus_setup_intr(dev, sc->sc_irq_res[0],
> INTR_TYPE_BIO | INTR_MPSAFE,
> NULL, (driver_intr_t *)musbotg_usbss_interrupt, sc,
>
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