svn commit: r275415 - head/contrib/binutils/gas/config

[Andrew Turner]

Author: andrew
Date: Tue Dec  2 18:12:16 2014
New Revision: 275415
URL: https://svnweb.freebsd.org/changeset/base/275415

Log:
  Allow the UAL APSR_nzcv format for the mrc and mrc2 instructions. The clang
  integrated assembler only allows these forms so binutils will need to
  support them.
  
  MFC after:	1 Week
  Sponsored by:	AB Systems Ltd

Modified:
  head/contrib/binutils/gas/config/tc-arm.c

Modified: head/contrib/binutils/gas/config/tc-arm.c
==============================================================================
--- head/contrib/binutils/gas/config/tc-arm.c	Tue Dec  2 17:10:11 2014	(r275414)
+++ head/contrib/binutils/gas/config/tc-arm.c	Tue Dec  2 18:12:16 2014	(r275415)
@@ -15055,7 +15055,7 @@ static const struct asm_opcode insns[] =
  TCE(stc,	c000000, ec000000, 3, (RCP, RCN, ADDRGLDC),	        lstc,   lstc),
  TC3(stcl,	c400000, ec400000, 3, (RCP, RCN, ADDRGLDC),	        lstc,   lstc),
  TCE(mcr,	e000010, ee000010, 6, (RCP, I7b, RR, RCN, RCN, oI7b),   co_reg, co_reg),
- TCE(mrc,	e100010, ee100010, 6, (RCP, I7b, RR, RCN, RCN, oI7b),   co_reg, co_reg),
+ TCE(mrc,	e100010, ee100010, 6, (RCP, I7b, APSR_RR, RCN, RCN, oI7b),   co_reg, co_reg),
 
 #undef ARM_VARIANT
 #define ARM_VARIANT &arm_ext_v2s /* ARM 3 - swp instructions.  */
@@ -15114,7 +15114,7 @@ static const struct asm_opcode insns[] =
  TUF(stc2l,	c400000, fc400000, 3, (RCP, RCN, ADDRGLDC),		        lstc,	lstc),
  TUF(cdp2,	e000000, fe000000, 6, (RCP, I15b, RCN, RCN, RCN, oI7b), cdp,    cdp),
  TUF(mcr2,	e000010, fe000010, 6, (RCP, I7b, RR, RCN, RCN, oI7b),   co_reg, co_reg),
- TUF(mrc2,	e100010, fe100010, 6, (RCP, I7b, RR, RCN, RCN, oI7b),   co_reg, co_reg),
+ TUF(mrc2,	e100010, fe100010, 6, (RCP, I7b, APSR_RR, RCN, RCN, oI7b),   co_reg, co_reg),
 
 #undef ARM_VARIANT
 #define ARM_VARIANT &arm_ext_v5exp /*  ARM Architecture 5TExP.  */