svn commit: r264160 - head/sys/arm/arm

[Rui Paulo]

Author: rpaulo
Date: Sat Apr  5 18:13:28 2014
New Revision: 264160
URL: http://svnweb.freebsd.org/changeset/base/264160

Log:
  Remove code under PMAP_CACHE_VIVT that is not compiled anymore.
  
  This is for ARMv4/ARMv5 and it doesn't belong in ARMv6 code.
  
  Reviewed by:	ian

Modified:
  head/sys/arm/arm/cpufunc_asm_arm11.S
  head/sys/arm/arm/cpufunc_asm_arm11x6.S
  head/sys/arm/arm/cpufunc_asm_armv6.S

Modified: head/sys/arm/arm/cpufunc_asm_arm11.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_arm11.S	Sat Apr  5 18:01:49 2014	(r264159)
+++ head/sys/arm/arm/cpufunc_asm_arm11.S	Sat Apr  5 18:13:28 2014	(r264160)
@@ -44,12 +44,6 @@ __FBSDID("$FreeBSD$");
  * addresses that are about to change.
  */
 ENTRY(arm11_setttb)
-#ifdef	PMAP_CACHE_VIVT
-	stmfd	sp!, {r0, lr}
-	bl	_C_LABEL(armv5_idcache_wbinv_all)
-	ldmfd	sp!, {r0, lr}
-#endif
-
 	mcr	p15, 0, r0, c2, c0, 0	/* load new TTB */
 
 	mcr	p15, 0, r0, c8, c7, 0	/* invalidate I+D TLBs */

Modified: head/sys/arm/arm/cpufunc_asm_arm11x6.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_arm11x6.S	Sat Apr  5 18:01:49 2014	(r264159)
+++ head/sys/arm/arm/cpufunc_asm_arm11x6.S	Sat Apr  5 18:13:28 2014	(r264160)
@@ -114,12 +114,7 @@ __FBSDID("$FreeBSD$");
 #endif
 
 ENTRY(arm11x6_setttb)
-#ifdef PMAP_CACHE_VIVT
-	Flush_D_cache(r1)
-	Invalidate_I_cache(r1, r2)
-#else
 	mov	r1, #0
-#endif
 	mcr	p15, 0, r0, c2, c0, 0	/* load new TTB */
 	mcr	p15, 0, r1, c8, c7, 0	/* invalidate I+D TLBs */
 	mcr	p15, 0, r1, c7, c10, 4	/* drain write buffer */

Modified: head/sys/arm/arm/cpufunc_asm_armv6.S
==============================================================================
--- head/sys/arm/arm/cpufunc_asm_armv6.S	Sat Apr  5 18:01:49 2014	(r264159)
+++ head/sys/arm/arm/cpufunc_asm_armv6.S	Sat Apr  5 18:13:28 2014	(r264160)
@@ -49,10 +49,6 @@
  * addresses that are about to change.
  */
 ENTRY(armv6_setttb)
-#ifdef PMAP_CACHE_VIVT
-	mcr	p15, 0, r0, c7, c5, 0	/* Flush I cache */
-	mcr	p15, 0, r0, c7, c14, 0	/* clean and invalidate D cache */
-#endif
 	mcr	p15, 0, r0, c7, c10, 4	/* drain the write buffer */
 
 	mcr	p15, 0, r0, c2, c0, 0	/* load new TTB */