svn commit: r259647 - head/sys/dev/hwpmc

[Attilio Rao]

Author: attilio
Date: Fri Dec 20 14:03:56 2013
New Revision: 259647
URL: http://svnweb.freebsd.org/changeset/base/259647

Log:
  o Remove assertions on ipa_version as sometimes the version detection
    using cpuid can be quirky (this is the case of VMWare without the
    vPMC support) but fail to probe hwpmc.
  o Apply the fix for XEON family of processors as established by
    315338-020 document (bug AJ85).
  
  Sponsored by:	EMC / Isilon storage division
  Reviewed by:	fabient

Modified:
  head/sys/dev/hwpmc/hwpmc_core.c
  head/sys/dev/hwpmc/hwpmc_core.h
  head/sys/dev/hwpmc/hwpmc_intel.c

Modified: head/sys/dev/hwpmc/hwpmc_core.c
==============================================================================
--- head/sys/dev/hwpmc/hwpmc_core.c	Fri Dec 20 13:18:50 2013	(r259646)
+++ head/sys/dev/hwpmc/hwpmc_core.c	Fri Dec 20 14:03:56 2013	(r259647)
@@ -2627,35 +2627,33 @@ core2_intr(int cpu, struct trapframe *tf
 }
 
 int
-pmc_core_initialize(struct pmc_mdep *md, int maxcpu)
+pmc_core_initialize(struct pmc_mdep *md, int maxcpu, int version_override)
 {
 	int cpuid[CORE_CPUID_REQUEST_SIZE];
 	int ipa_version, flags, nflags;
 
 	do_cpuid(CORE_CPUID_REQUEST, cpuid);
 
-	ipa_version = cpuid[CORE_CPUID_EAX] & 0xFF;
+	ipa_version = (version_override > 0) ? version_override :
+	    cpuid[CORE_CPUID_EAX] & 0xFF;
+	core_cputype = md->pmd_cputype;
 
 	PMCDBG(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d",
-	    md->pmd_cputype, maxcpu, ipa_version);
+	    core_cputype, maxcpu, ipa_version);
 
-	if (ipa_version < 1 || ipa_version > 3) {
+	if (ipa_version < 1 || ipa_version > 3 ||
+	    (core_cputype != PMC_CPU_INTEL_CORE && ipa_version == 1)) {
 		/* Unknown PMC architecture. */
 		printf("hwpc_core: unknown PMC architecture: %d\n",
 		    ipa_version);
 		return (EPROGMISMATCH);
 	}
 
-	core_cputype = md->pmd_cputype;
-
 	core_pmcmask = 0;
 
 	/*
 	 * Initialize programmable counters.
 	 */
-	KASSERT(ipa_version >= 1,
-	    ("[core,%d] ipa_version %d too small", __LINE__, ipa_version));
-
 	core_iap_npmc = (cpuid[CORE_CPUID_EAX] >> 8) & 0xFF;
 	core_iap_width = (cpuid[CORE_CPUID_EAX] >> 16) & 0xFF;
 
@@ -2670,10 +2668,6 @@ pmc_core_initialize(struct pmc_mdep *md,
 	 * Initialize fixed function counters, if present.
 	 */
 	if (core_cputype != PMC_CPU_INTEL_CORE) {
-		KASSERT(ipa_version >= 2,
-		    ("[core,%d] ipa_version %d too small", __LINE__,
-			ipa_version));
-
 		core_iaf_ri = core_iap_npmc;
 		core_iaf_npmc = cpuid[CORE_CPUID_EDX] & 0x1F;
 		core_iaf_width = (cpuid[CORE_CPUID_EDX] >> 5) & 0xFF;

Modified: head/sys/dev/hwpmc/hwpmc_core.h
==============================================================================
--- head/sys/dev/hwpmc/hwpmc_core.h	Fri Dec 20 13:18:50 2013	(r259646)
+++ head/sys/dev/hwpmc/hwpmc_core.h	Fri Dec 20 14:03:56 2013	(r259647)
@@ -175,7 +175,8 @@ struct pmc_md_iap_pmc {
  * Prototypes.
  */
 
-int	pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu);
+int	pmc_core_initialize(struct pmc_mdep *_md, int _maxcpu,
+	    int _version_override);
 void	pmc_core_finalize(struct pmc_mdep *_md);
 
 void	pmc_core_mark_started(int _cpu, int _pmc);

Modified: head/sys/dev/hwpmc/hwpmc_intel.c
==============================================================================
--- head/sys/dev/hwpmc/hwpmc_intel.c	Fri Dec 20 13:18:50 2013	(r259646)
+++ head/sys/dev/hwpmc/hwpmc_intel.c	Fri Dec 20 14:03:56 2013	(r259647)
@@ -78,7 +78,7 @@ pmc_intel_initialize(void)
 {
 	struct pmc_mdep *pmc_mdep;
 	enum pmc_cputype cputype;
-	int error, model, nclasses, ncpus;
+	int error, model, nclasses, ncpus, stepping, verov;
 
 	KASSERT(cpu_vendor_id == CPU_VENDOR_INTEL,
 	    ("[intel,%d] Initializing non-intel processor", __LINE__));
@@ -88,7 +88,9 @@ pmc_intel_initialize(void)
 	cputype = -1;
 	nclasses = 2;
 	error = 0;
+	verov = 0;
 	model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
+	stepping = cpu_id & 0xF;
 
 	switch (cpu_id & 0xF00) {
 #if	defined(__i386__)
@@ -119,8 +121,14 @@ pmc_intel_initialize(void)
 			cputype = PMC_CPU_INTEL_CORE;
 			break;
 		case 0xF:
-			cputype = PMC_CPU_INTEL_CORE2;
-			nclasses = 3;
+			/* Per Intel document 315338-020. */
+			if (stepping == 0x7) {
+				cputype = PMC_CPU_INTEL_CORE;
+				verov = 1;
+			} else {
+				cputype = PMC_CPU_INTEL_CORE2;
+				nclasses = 3;
+			}
 			break;
 		case 0x17:
 			cputype = PMC_CPU_INTEL_CORE2EXTREME;
@@ -210,7 +218,7 @@ pmc_intel_initialize(void)
 	case PMC_CPU_INTEL_SANDYBRIDGE_XEON:
 	case PMC_CPU_INTEL_IVYBRIDGE_XEON:
 	case PMC_CPU_INTEL_HASWELL:
-		error = pmc_core_initialize(pmc_mdep, ncpus);
+		error = pmc_core_initialize(pmc_mdep, ncpus, verov);
 		break;
 
 		/*