svn commit: r238755 - head/sys/x86/x86

[Konstantin Belousov]

On Wed, Jul 25, 2012 at 08:29:57AM -0700, Jim Harris wrote:
> On Wed, Jul 25, 2012 at 6:37 AM, Konstantin Belousov
> <kostikbel at gmail.com> wrote:
> > -/* rmb is required here because rdtsc is not a serializing instruction. */
> > +/*
> > + * RDTSC is not a serializing instruction, so we need to drain
> > + * instruction stream before executing it. It could be fixed by use of
> > + * RDTSCP, except the instruction is not available everywhere.
> > + *
> > + * Insert both MFENCE for AMD CPUs, and LFENCE for others (Intel and
> > + * VIA), and assume that SMP test is only performed on CPUs that have
> > + * SSE2 anyway.
> > + */
> >  #define        TSC_READ(x)                     \
> >  static void                            \
> >  tsc_read_##x(void *arg)                        \
> > @@ -337,6 +361,7 @@ tsc_read_##x(void *arg)                     \
> >         u_int cpu = PCPU_GET(cpuid);    \
> >                                         \
> >         rmb();                          \
> > +       mb();                           \
> >         tsc[cpu * 3 + x] = rdtsc32();   \
> 
> I've seen bde@'s comments, so perhaps this patch will not move
> forward, but I'm wondering if it would make sense here to just call
> the new tsc_get_timecount_mfence() function rather than explicitly
> call mb() and then rdtsc32().

I think that this in fact shall call cpuid() instead of rmb()/mb().
The genuine Pentiums, PentiumPro and Pentium II/III can be used in SMP
configuration but definitely lack LFENCE.

Regarding the patch, either it or some close relative to it shall be
implemented, since otherwise we are simply incorrect, as you demonstrated.
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