svn commit: r219419 - in head/sys/dev/ath/ath_hal: ar5212 ar5416
Adrian Chadd
adrian at FreeBSD.org
Wed Mar 9 04:39:36 UTC 2011
Author: adrian
Date: Wed Mar 9 04:39:35 2011
New Revision: 219419
URL: http://svn.freebsd.org/changeset/base/219419
Log:
For chips that are full reset in ar5416ChipReset(), save and restore the TSF.
Merlin (ar9280) and later were full-reset if they're doing open-loop TX
power control but the TSF wasn't being saved/restored.
Add ar5212SetTsf64() which sets the 64 bit TSF appropriately.
Modified:
head/sys/dev/ath/ath_hal/ar5212/ar5212.h
head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
Modified: head/sys/dev/ath/ath_hal/ar5212/ar5212.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5212/ar5212.h Wed Mar 9 02:23:21 2011 (r219418)
+++ head/sys/dev/ath/ath_hal/ar5212/ar5212.h Wed Mar 9 04:39:35 2011 (r219419)
@@ -462,6 +462,7 @@ extern void ar5212WriteAssocid(struct at
uint16_t assocId);
extern uint32_t ar5212GetTsf32(struct ath_hal *ah);
extern uint64_t ar5212GetTsf64(struct ath_hal *ah);
+extern void ar5212SetTsf64(struct ath_hal *ah, uint64_t tsf64);
extern void ar5212ResetTsf(struct ath_hal *ah);
extern void ar5212SetBasicRate(struct ath_hal *ah, HAL_RATE_SET *pSet);
extern uint32_t ar5212GetRandomSeed(struct ath_hal *ah);
Modified: head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Wed Mar 9 02:23:21 2011 (r219418)
+++ head/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c Wed Mar 9 04:39:35 2011 (r219419)
@@ -264,6 +264,13 @@ ar5212GetTsf32(struct ath_hal *ah)
return OS_REG_READ(ah, AR_TSF_L32);
}
+void
+ar5212SetTsf64(struct ath_hal *ah, uint64_t tsf64)
+{
+ OS_REG_WRITE(ah, AR_TSF_L32, tsf64 & 0xffffffff);
+ OS_REG_WRITE(ah, AR_TSF_U32, (tsf64 >> 32) & 0xffffffff);
+}
+
/*
* Reset the current hardware tsf for stamlme.
*/
Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Wed Mar 9 02:23:21 2011 (r219418)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Wed Mar 9 04:39:35 2011 (r219419)
@@ -95,6 +95,7 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
uint32_t powerVal, rssiThrReg;
uint32_t ackTpcPow, ctsTpcPow, chirpTpcPow;
int i;
+ uint64_t tsf = 0;
OS_MARK(ah, AH_MARK_RESET, bChannelChange);
@@ -151,6 +152,10 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
(AR_MAC_LED_ASSOC | AR_MAC_LED_MODE |
AR_MAC_LED_BLINK_THRESH_SEL | AR_MAC_LED_BLINK_SLOW);
+ /* For chips on which the RTC reset is done, save TSF before it gets cleared */
+ if (AR_SREV_MERLIN_20_OR_LATER(ah) && ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL))
+ tsf = ar5212GetTsf64(ah);
+
if (!ar5416ChipReset(ah, chan)) {
HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
FAIL(HAL_EIO);
@@ -159,6 +164,10 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
/* Restore bmiss rssi & count thresholds */
OS_REG_WRITE(ah, AR_RSSI_THR, rssiThrReg);
+ /* Restore TSF */
+ if (tsf)
+ ar5212SetTsf64(ah, tsf);
+
OS_MARK(ah, AH_MARK_RESET_LINE, __LINE__);
if (AR_SREV_MERLIN_10_OR_LATER(ah))
OS_REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
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