svn commit: r219046 - head/sys/x86/cpufreq
jkim at FreeBSD.org
Fri Feb 25 23:14:25 UTC 2011
Date: Fri Feb 25 23:14:24 2011
New Revision: 219046
Set C1 "I/O then Halt" capability bit for Intel EIST. Some broken BIOSes
refuse to load external SSDTs if this bit is unset for _PDC. It seems Linux
and OpenSolaris did the same long ago.
MFC after: 1 week
--- head/sys/x86/cpufreq/est.c Fri Feb 25 23:05:35 2011 (r219045)
+++ head/sys/x86/cpufreq/est.c Fri Feb 25 23:14:24 2011 (r219046)
@@ -947,8 +947,11 @@ static int
est_features(driver_t *driver, u_int *features)
- /* Notify the ACPI CPU that we support direct access to MSRs */
- *features = ACPI_CAP_PERF_MSRS;
+ * Notify the ACPI CPU that we support direct access to MSRs.
+ * XXX C1 "I/O then Halt" seems necessary for some broken BIOS.
+ *features = ACPI_CAP_PERF_MSRS | ACPI_CAP_C1_IO_HALT;
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