svn commit: r205221 - head/sys/dev/bge

[Andrew Gallatin]

Pyun YongHyeon wrote:

>   Revert r205090.
>   It's hard to know when the mail box register write will get flushed to
>   the hardware and it may take longer.
>   
>   Pointed out by:	scottl


I may be mis-reading the code, but it looks like the mailbox
register is in memory space, which should be flushed immediately
unless write-combining is enabled on the region.  The bge
driver does not seem to be setting up write combining.
Is the concern that something may enable write combining
behind your back?  In that case, a wmb() could act as a
serializing instruction and flush the WC buffers.

Or is it something completely different? Eg, maybe the chip
polls the mailboxes at some regular interval, and it doesn't
notice a write immediately. So writing earlier gives a better chance
that it will see the new value sooner.

Drew