svn commit: r209777 - stable/7/sys/sparc64/include

Marius Strobl marius at FreeBSD.org
Wed Jul 7 19:52:59 UTC 2010


Author: marius
Date: Wed Jul  7 19:52:57 2010
New Revision: 209777
URL: http://svn.freebsd.org/changeset/base/209777

Log:
  MFC: r209695
  
  - Pin the IPI cache and TLB demap functions in order to prevent migration
    between determining the other CPUs and calling cpu_ipi_selected(), which
    apart from generally doing the wrong thing can lead to a panic when a
    CPU is told to IPI itself (which sun4u doesn't support).
    Reported and tested by: Nathaniel W Filardo
  - Add __unused where appropriate.

Modified:
  stable/7/sys/sparc64/include/smp.h
Directory Properties:
  stable/7/sys/   (props changed)
  stable/7/sys/cddl/contrib/opensolaris/   (props changed)
  stable/7/sys/contrib/dev/acpica/   (props changed)
  stable/7/sys/contrib/pf/   (props changed)

Modified: stable/7/sys/sparc64/include/smp.h
==============================================================================
--- stable/7/sys/sparc64/include/smp.h	Wed Jul  7 19:52:50 2010	(r209776)
+++ stable/7/sys/sparc64/include/smp.h	Wed Jul  7 19:52:57 2010	(r209777)
@@ -38,6 +38,9 @@
 
 #ifndef	LOCORE
 
+#include <sys/proc.h>
+#include <sys/sched.h>
+
 #include <machine/intr_machdep.h>
 #include <machine/pcb.h>
 #include <machine/tte.h>
@@ -138,6 +141,7 @@ ipi_dcache_page_inval(void *func, vm_pad
 
 	if (smp_cpus == 1)
 		return (NULL);
+	sched_pin();
 	ica = &ipi_cache_args;
 	mtx_lock_spin(&ipi_mtx);
 	ica->ica_mask = all_cpus;
@@ -153,6 +157,7 @@ ipi_icache_page_inval(void *func, vm_pad
 
 	if (smp_cpus == 1)
 		return (NULL);
+	sched_pin();
 	ica = &ipi_cache_args;
 	mtx_lock_spin(&ipi_mtx);
 	ica->ica_mask = all_cpus;
@@ -169,8 +174,11 @@ ipi_tlb_context_demap(struct pmap *pm)
 
 	if (smp_cpus == 1)
 		return (NULL);
-	if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0)
+	sched_pin();
+	if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
+		sched_unpin();
 		return (NULL);
+	}
 	ita = &ipi_tlb_args;
 	mtx_lock_spin(&ipi_mtx);
 	ita->ita_mask = cpus | PCPU_GET(cpumask);
@@ -188,8 +196,11 @@ ipi_tlb_page_demap(struct pmap *pm, vm_o
 
 	if (smp_cpus == 1)
 		return (NULL);
-	if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0)
+	sched_pin();
+	if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
+		sched_unpin();
 		return (NULL);
+	}
 	ita = &ipi_tlb_args;
 	mtx_lock_spin(&ipi_mtx);
 	ita->ita_mask = cpus | PCPU_GET(cpumask);
@@ -207,8 +218,11 @@ ipi_tlb_range_demap(struct pmap *pm, vm_
 
 	if (smp_cpus == 1)
 		return (NULL);
-	if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0)
+	sched_pin();
+	if ((cpus = (pm->pm_active & PCPU_GET(other_cpus))) == 0) {
+		sched_unpin();
 		return (NULL);
+	}
 	ita = &ipi_tlb_args;
 	mtx_lock_spin(&ipi_mtx);
 	ita->ita_mask = cpus | PCPU_GET(cpumask);
@@ -229,6 +243,7 @@ ipi_wait(void *cookie)
 		while (*mask != 0)
 			;
 		mtx_unlock_spin(&ipi_mtx);
+		sched_unpin();
 	}
 }
 
@@ -241,35 +256,36 @@ ipi_wait(void *cookie)
 #ifndef	LOCORE
 
 static __inline void *
-ipi_dcache_page_inval(void *func, vm_paddr_t pa)
+ipi_dcache_page_inval(void *func __unused, vm_paddr_t pa __unused)
 {
 
 	return (NULL);
 }
 
 static __inline void *
-ipi_icache_page_inval(void *func, vm_paddr_t pa)
+ipi_icache_page_inval(void *func __unused, vm_paddr_t pa __unused)
 {
 
 	return (NULL);
 }
 
 static __inline void *
-ipi_tlb_context_demap(struct pmap *pm)
+ipi_tlb_context_demap(struct pmap *pm __unused)
 {
 
 	return (NULL);
 }
 
 static __inline void *
-ipi_tlb_page_demap(struct pmap *pm, vm_offset_t va)
+ipi_tlb_page_demap(struct pmap *pm __unused, vm_offset_t va __unused)
 {
 
 	return (NULL);
 }
 
 static __inline void *
-ipi_tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
+ipi_tlb_range_demap(struct pmap *pm __unused, vm_offset_t start __unused,
+    __unused vm_offset_t end)
 {
 
 	return (NULL);


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