svn commit: r206041 - stable/8/sys/powerpc/aim

Nathan Whitehorn nwhitehorn at FreeBSD.org
Thu Apr 1 13:21:04 UTC 2010


Author: nwhitehorn
Date: Thu Apr  1 13:21:04 2010
New Revision: 206041
URL: http://svn.freebsd.org/changeset/base/206041

Log:
  MFC r205163:
  
  Fix two small bugs. The PowerPC 970 does not support non-coherent memory
  access, and reflects this by autonomously writing LPTE_M into PTE entries.
  As such, we should not panic if LPTE_M changes by itself. While here,
  fix a harmless typo in moea64_sync_icache().

Modified:
  stable/8/sys/powerpc/aim/mmu_oea64.c
Directory Properties:
  stable/8/sys/   (props changed)
  stable/8/sys/amd64/include/xen/   (props changed)
  stable/8/sys/cddl/contrib/opensolaris/   (props changed)
  stable/8/sys/contrib/dev/acpica/   (props changed)
  stable/8/sys/contrib/pf/   (props changed)
  stable/8/sys/dev/xen/xenpci/   (props changed)
  stable/8/sys/net/   (props changed)

Modified: stable/8/sys/powerpc/aim/mmu_oea64.c
==============================================================================
--- stable/8/sys/powerpc/aim/mmu_oea64.c	Thu Apr  1 13:16:32 2010	(r206040)
+++ stable/8/sys/powerpc/aim/mmu_oea64.c	Thu Apr  1 13:21:04 2010	(r206041)
@@ -2246,7 +2246,7 @@ moea64_pvo_to_pte(const struct pvo_entry
 		}
 
 		if (((pt->pte_lo ^ pvo->pvo_pte.lpte.pte_lo) & 
-		    ~(LPTE_CHG|LPTE_REF)) != 0) {
+		    ~(LPTE_M|LPTE_CHG|LPTE_REF)) != 0) {
 			panic("moea64_pvo_to_pte: pvo %p pte does not match "
 			    "pte %p in moea64_pteg_table difference is %#x", 
 			    pvo, pt,
@@ -2488,7 +2488,7 @@ moea64_sync_icache(mmu_t mmu, pmap_t pm,
 		len = MIN(lim - va, sz);
 		pvo = moea64_pvo_find_va(pm, va & ~ADDR_POFF, NULL);
 		if (pvo != NULL) {
-			pa = (pvo->pvo_pte.pte.pte_lo & PTE_RPGN) |
+			pa = (pvo->pvo_pte.pte.pte_lo & LPTE_RPGN) |
 			    (va & ADDR_POFF);
 			moea64_syncicache(pm, va, pa, len);
 		}


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