svn commit: r197450 - in head/sys: amd64/pci dev/pci i386/pci

[Andriy Gapon]

Author: avg
Date: Thu Sep 24 07:11:23 2009
New Revision: 197450
URL: http://svn.freebsd.org/changeset/base/197450

Log:
  number of cleanups in i386 and amd64 pci md code
  
  o introduce PCIE_REGMAX and use it instead of ad-hoc constant
  o where 'reg' parameter/variable is not already unsigned, cast it to
    unsigned before comparison with maximum value to cut off negative
    values
  o use PCI_SLOTMAX in several places where 31 or 32 were explicitly used
  o drop redundant check of 'bytes' in i386 pciereg_cfgread() - valid
    values are already checked in the subsequent switch
  
  Reviewed by:	jhb
  MFC after:	1 week

Modified:
  head/sys/amd64/pci/pci_cfgreg.c
  head/sys/dev/pci/pcireg.h
  head/sys/i386/pci/pci_cfgreg.c

Modified: head/sys/amd64/pci/pci_cfgreg.c
==============================================================================
--- head/sys/amd64/pci/pci_cfgreg.c	Thu Sep 24 06:00:49 2009	(r197449)
+++ head/sys/amd64/pci/pci_cfgreg.c	Thu Sep 24 07:11:23 2009	(r197450)
@@ -181,9 +181,9 @@ pci_cfgenable(unsigned bus, unsigned slo
 {
 	int dataport = 0;
 
-	if (bus <= PCI_BUSMAX && slot < 32 && func <= PCI_FUNCMAX &&
-	    reg <= PCI_REGMAX && bytes != 3 && (unsigned) bytes <= 4 &&
-	    (reg & (bytes - 1)) == 0) {
+	if (bus <= PCI_BUSMAX && slot <= PCI_SLOTMAX && func <= PCI_FUNCMAX &&
+	    (unsigned)reg <= PCI_REGMAX && bytes != 3 &&
+	    (unsigned)bytes <= 4 && (reg & (bytes - 1)) == 0) {
 		outl(CONF1_ADDR_PORT, (1 << 31) | (bus << 16) | (slot << 11) 
 		    | (func << 8) | (reg & ~0x03));
 		dataport = CONF1_DATA_PORT + (reg & 0x03);
@@ -281,7 +281,7 @@ pcie_cfgregopen(uint64_t base, uint8_t m
 	 * fall back to using type 1 config access instead.
 	 */
 	if (pci_cfgregopen() != 0) {
-		for (slot = 0; slot < 32; slot++) {
+		for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
 			val1 = pcireg_cfgread(0, slot, 0, 0, 4);
 			if (val1 == 0xffffffff)
 				continue;
@@ -309,8 +309,8 @@ pciereg_cfgread(int bus, unsigned slot, 
 	volatile vm_offset_t va;
 	int data = -1;
 
-	if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 ||
-	    func > PCI_FUNCMAX || reg >= 0x1000)
+	if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
+	    func > PCI_FUNCMAX || reg > PCIE_REGMAX)
 		return (-1);
 
 	va = PCIE_VADDR(pcie_base, reg, bus, slot, func);
@@ -336,8 +336,8 @@ pciereg_cfgwrite(int bus, unsigned slot,
 {
 	volatile vm_offset_t va;
 
-	if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 ||
-	    func > PCI_FUNCMAX || reg >= 0x1000)
+	if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
+	    func > PCI_FUNCMAX || reg > PCIE_REGMAX)
 		return;
 
 	va = PCIE_VADDR(pcie_base, reg, bus, slot, func);

Modified: head/sys/dev/pci/pcireg.h
==============================================================================
--- head/sys/dev/pci/pcireg.h	Thu Sep 24 06:00:49 2009	(r197449)
+++ head/sys/dev/pci/pcireg.h	Thu Sep 24 07:11:23 2009	(r197450)
@@ -44,6 +44,7 @@
 #define	PCI_SLOTMAX	31	/* highest supported slot number */
 #define	PCI_FUNCMAX	7	/* highest supported function number */
 #define	PCI_REGMAX	255	/* highest supported config register addr. */
+#define	PCIE_REGMAX	4095	/* highest supported config register addr. */
 #define	PCI_MAXHDRTYPE	2
 
 /* PCI config header registers for all devices */

Modified: head/sys/i386/pci/pci_cfgreg.c
==============================================================================
--- head/sys/i386/pci/pci_cfgreg.c	Thu Sep 24 06:00:49 2009	(r197449)
+++ head/sys/i386/pci/pci_cfgreg.c	Thu Sep 24 07:11:23 2009	(r197450)
@@ -299,9 +299,9 @@ pci_cfgenable(unsigned bus, unsigned slo
 	if (bus <= PCI_BUSMAX
 	    && slot < devmax
 	    && func <= PCI_FUNCMAX
-	    && reg <= PCI_REGMAX
+	    && (unsigned)reg <= PCI_REGMAX
 	    && bytes != 3
-	    && (unsigned) bytes <= 4
+	    && (unsigned)bytes <= 4
 	    && (reg & (bytes - 1)) == 0) {
 		switch (cfgmech) {
 		case CFGMECH_PCIE:
@@ -595,7 +595,7 @@ pcie_cfgregopen(uint64_t base, uint8_t m
 	 * fall back to using type 1 config access instead.
 	 */
 	if (pci_cfgregopen() != 0) {
-		for (slot = 0; slot < 32; slot++) {
+		for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
 			val1 = pcireg_cfgread(0, slot, 0, 0, 4);
 			if (val1 == 0xffffffff)
 				continue;
@@ -661,8 +661,8 @@ pciereg_cfgread(int bus, unsigned slot, 
 	vm_paddr_t pa, papage;
 	int data = -1;
 
-	if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 ||
-	    func > PCI_FUNCMAX || reg >= 0x1000 || bytes > 4 || bytes == 3)
+	if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
+	    func > PCI_FUNCMAX || reg > PCIE_REGMAX)
 		return (-1);
 
 	critical_enter();
@@ -695,8 +695,8 @@ pciereg_cfgwrite(int bus, unsigned slot,
 	volatile vm_offset_t va;
 	vm_paddr_t pa, papage;
 
-	if (bus < pcie_minbus || bus > pcie_maxbus || slot >= 32 ||
-	    func > PCI_FUNCMAX || reg >= 0x1000)
+	if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX ||
+	    func > PCI_FUNCMAX || reg > PCIE_REGMAX)
 		return;
 
 	critical_enter();